Symbolic and Compositional Reachability for Timed Automata

  • Kim Guldstrand Larsen
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6227)


The model-checker Uppaal [LPY97] is based on the theory of timed automata [AD90] and its modeling languague offers additional features such as networks of timed automata, clocks and stop-watches, synchronizing over synchronous and broadcast channels, discrete variables ranging over bounded integers or structured types (arrays and records) as well as user-defined types and functions.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [AD90]
    Alur, R., Dill, D.: Automata for modeling real-time systems. In: Paterson, M. (ed.) ICALP 1990. LNCS, vol. 443, pp. 322–335. Springer, Heidelberg (1990)CrossRefGoogle Scholar
  2. [ALTP01]
    Alur, R., La Torre, S., Pappas, G.J.: Optimal Paths in Weighted Timed Automata. In: Di Benedetto, M.D., Sangiovanni-Vincentelli, A.L. (eds.) HSCC 2001. LNCS, vol. 2034, pp. 49–62. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  3. [AM01]
    Abdeddaïm, Y., Maler, O.: Job-shop scheduling using timed automata. In: Berry, G., Comon, H., Finkel, A. (eds.) CAV 2001. LNCS, vol. 2102, pp. 478–492. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  4. [BBFL03]
    Behrmann, G., Bouyer, P., Fleury, E., Larsen, K.G.: Static guard analysis in timed automata verification. In: Garavel, H., Hatcliff, J. (eds.) TACAS 2003. LNCS, vol. 2619, pp. 254–277. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  5. [BBLP04]
    Behrmann, G., Bouyer, P., Larsen, K.G., Pelánek, R.: Lower and upper bounds in zone based abstractions of timed automata. In: Jensen, K., Podelski, A. (eds.) TACAS 2004. LNCS, vol. 2988, pp. 312–326. Springer, Heidelberg (2004)CrossRefGoogle Scholar
  6. [BBLP06]
    Behrmann, G., Bouyer, P., Larsen, K.G., Pelánek, R.: Lower and upper bounds in zone-based abstractions of timed automata. STTT 8(3), 204–215 (2006)CrossRefGoogle Scholar
  7. [BDL+10]
    Behrmann, G., David, A., Larsen, K.G., Pettersson, P., Yi, W.: Developing uppaal over 15 years. Software – Practice and Experience (to appear, 2010)Google Scholar
  8. [Bel58]
    Bellman, R.: Dynamic programming and stochastic control processes. Information and Control 1(3), 228–239 (1958)MATHCrossRefMathSciNetGoogle Scholar
  9. [BFH+01]
    Behrmann, G., Fehnker, A., Hune, T., Larsen, K.G., Pettersson, P., Romijn, J., Vaandrager, F.: Minimum-cost reachability for priced timed automata. In: Di Benedetto, M.D., Sangiovanni-Vincentelli, A.L. (eds.) HSCC 2001. LNCS, vol. 2034, pp. 147–161. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  10. [BHM08]
    Brekling, A.W., Hansen, M.R., Madsen, J.: Models and formal verification of multiprocessor system-on-chips. J. Log. Algebr. Program. 77(1-2), 1–19 (2008)MATHCrossRefMathSciNetGoogle Scholar
  11. [BLA+99]
    Behrmann, G., Larsen, K.G., Andersen, H.R., Hulgaard, H., Lind-Nielsen, J.: Verification of hierarchical state/event systems using reusability and compositionality. In: Cleaveland, W.R. (ed.) TACAS 1999. LNCS, vol. 1579, pp. 163–177. Springer, Heidelberg (1999)CrossRefGoogle Scholar
  12. [BLP+99]
    Behrmann, G., Larsen, K.G., Pearson, J., Weise, C., Yi, W.: Efficient timed reachability analysis using clock difference diagrams. In: Halbwachs, N., Peled, D.A. (eds.) CAV 1999. LNCS, vol. 1633, pp. 341–353. Springer, Heidelberg (1999)CrossRefGoogle Scholar
  13. [CL00]
    Cassez, F., Larsen, K.G.: The impressive power of stopwatches. In: Palamidessi, C. (ed.) CONCUR 2000. LNCS, vol. 1877, pp. 138–152. Springer, Heidelberg (2000)CrossRefGoogle Scholar
  14. [Dil89]
    Dill, D.L.: Timing assumptions and verification of finite-state concurrent systems. In: Sifakis, J. (ed.) CAV 1989. LNCS, vol. 407, pp. 197–212. Springer, Heidelberg (1990)Google Scholar
  15. [DKJS09]
    David, A., Larsen, K.G., Illum, J., Skou, A.: Model-Based Framework for Schedulability Analysis Using UPPAAL 4.1. In: Model-Based Design for Embedded Systems. Computational Analysis, Synthesis, and Design of Dynamic Systems. CRC Press, Boca Raton (2009)Google Scholar
  16. [HMB07]
    Hansen, M.R., Madsen, J., Brekling, A.W.: Semantics and verification of a language for modelling hardware architectures. In: Jones, C.B., Liu, Z., Woodcock, J. (eds.) Formal Methods and Hybrid Real-Time Systems. LNCS, vol. 4700, pp. 300–319. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  17. [HvdNV06]
    Hendriks, M., van den Nieuwelaar, B., Vaandrager, F.W.: Model checker aided design of a controller for a wafer scanner. STTT 8(6), 633–647 (2006)CrossRefGoogle Scholar
  18. [IKY+08]
    Igna, G., Kannan, V., Yang, Y., Basten, T., Geilen, M., Vaandrager, F.W., Voorhoeve, M., de Smet, S., Somers, L.J.: Formal modeling and scheduling of datapaths of digital document printers. In: Cassez, F., Jard, C. (eds.) FORMATS 2008. LNCS, vol. 5215, pp. 170–187. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  19. [LL98a]
    Laroussinie, F., Larsen, K.G.: CMC: A tool for compositional model-checking of real-time systems. In: Proc. IFIP Joint Int. Conf. on Formal Description Techniques & Protocol Specification, Testing, and Verification (FORTE-PSTV’98), pp. 439–456. Kluwer Academic Publishers, Dordrecht (1998)Google Scholar
  20. [LL98b]
    Laroussinie, F., Larsen, K.G.: Cmc: A tool for compositional model-checking of real-time systems. In: Budkowski, S., Cavalli, A.R., Najm, E. (eds.) FORTE, IFIP Conference Proceedings, vol. 135, pp. 439–456. Kluwer, Dordrecht (1998)Google Scholar
  21. [LLPY97]
    Larsen, K.G., Larsson, F., Pettersson, P., Yi, W.: Efficient verification of real-time systems: compact data structure and state-space reduction. In: IEEE Real-Time Systems Symposium, pp. 14–24. IEEE Computer Society, Los Alamitos (1997)Google Scholar
  22. [LLW95]
    Laroussinie, F., Larsen, K.G., Weise, C.: From timed automata to logic – and back. In: Hájek, P., Wiedermann, J. (eds.) MFCS 1995. LNCS, vol. 969, pp. 529–539. Springer, Heidelberg (1995)Google Scholar
  23. [LNAB+98]
    Lind-Nielsen, J., Andersen, H.R., Behrmann, G., Hulgaard, H., Kristoffersen, K. J., Larsen, K.G.: Verification of large state/event systems using compositionality and dependency analysis. In: Steffen, B. (ed.) TACAS 1998. LNCS, vol. 1384, pp. 201–216. Springer, Heidelberg (1998)CrossRefGoogle Scholar
  24. [LPY97]
    Larsen, K.G., Pettersson, P., Yi, W.: Uppaal in a nutshell. STTT 1(1-2), 134–152 (1997)MATHGoogle Scholar
  25. [Nym02]
    Nyman, U.: Compositional bachwards reachability of timed automata. Master’s thesis, Department of Computer Science, Aalborg University (2002)Google Scholar
  26. [PvV10]
    Poulsen, D.B., van Vliet, J.W.B.P.T.: Concrete traces for uppaal. Master’s thesis, Department of Computer Science. Aalborg University (2010)Google Scholar
  27. [TY96]
    Tripakis, S., Yovine, S.: Analysis of timed systems based on time-abstracting bisimulation. In: Alur, R., Henzinger, T.A. (eds.) CAV 1996. LNCS, vol. 1102, pp. 232–243. Springer, Heidelberg (1996)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2010

Authors and Affiliations

  • Kim Guldstrand Larsen
    • 1
  1. 1.Department of Computer ScienceAalborg UniversityDenmark

Personalised recommendations