When Clocks Fail: On Critical Paths and Clock Faults

  • Michel Agoyan
  • Jean-Max Dutertre
  • David Naccache
  • Bruno Robisson
  • Assia Tria
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6035)

Abstract

Whilst clock fault attacks are known to be a serious security threat, an in-depth explanation of such faults still seems to be put in order.

This work provides a theoretical analysis, backed by practical experiments, explaining when and how clock faults occur. Understanding and modeling the chain of events following a transient clock alteration allows to accurately predict faulty circuit behavior. A prediction fully confirmed by injecting variable-duration faults at predetermined clock cycles.

We illustrate the process by successfully attacking an fpga aes implementation using a dll-based fpga platform (one-bit fault attack).

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Copyright information

© Springer-Verlag Berlin Heidelberg 2010

Authors and Affiliations

  • Michel Agoyan
    • 1
  • Jean-Max Dutertre
    • 2
  • David Naccache
    • 1
    • 3
  • Bruno Robisson
    • 1
  • Assia Tria
    • 1
  1. 1.Centre microélectronique de Provence G. Charpak, Département SASCEA-LETIGardanneFrance
  2. 2.Centre microélectronique de Provence G. Charpak, Département SASÉcole nationale supérieure des Mines de Saint-ÉtienneGardanneFrance
  3. 3.Département d’informatique, Équipe de cryptographieÉcole normale supérieureParis CEDEX 05France

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