Computational Statistics Approach to Capacitance Sensitivity Analysis and Gate Delay Time Minimization of TFT-LCDs
In this paper, we practically implement a systematical method for thin-film transistor liquid-crystal display (TFT-LCD) design optimization and sensitivity analysis. Based upon a three-dimensional (3D) field solver and a Design of Experiments, we construct a second-order response surface model (RSM) to examine the capacitances’ effect on the performance of an interested TFT-LCD pixel. The constructed RSMs are reduced using a step-wise regression. We verify the accuracy using the normal residual plots and their residual of squares. According to the models, we then analyze the sensitivity of the capacitances by considering the design parameters as changing factors (i.e., the size variation and the position shift) under an assumption of Gaussian distribution. Consequently, we further apply the models to optimize the designed circuit. The designing parameters of these models are selected and optimized to fit the designing target of the examined circuit by the genetic algorithm in our unified optimization framework. This computational statistics method predicts the capacitances’ effects on the gate delay time and compares with full 3D simulation approaches, it shows the engineering practicability in display panel industry.
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