A Comparison of Three Commodity-Level Parallel Architectures: Multi-core CPU, Cell BE and GPU

André Rigland Brodtkorb; Trond Runar Hagen

doi:10.1007/978-3-642-11620-9_6

International Conference on Mathematical Methods for Curves and Surfaces

MMCS 2008: Mathematical Methods for Curves and Surfaces pp 70-80

A Comparison of Three Commodity-Level Parallel Architectures: Multi-core CPU, Cell BE and GPU

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Authors and affiliations

André Rigland Brodtkorb
Trond Runar Hagen

Conference paper

DOI: 10.1007/978-3-642-11620-9_6

Part of the Lecture Notes in Computer Science book series (LNCS, volume 5862)

Cite this paper as:: Brodtkorb A.R., Hagen T.R. (2010) A Comparison of Three Commodity-Level Parallel Architectures: Multi-core CPU, Cell BE and GPU. In: Dæhlen M., Floater M., Lyche T., Merrien JL., Mørken K., Schumaker L.L. (eds) Mathematical Methods for Curves and Surfaces. MMCS 2008. Lecture Notes in Computer Science, vol 5862. Springer, Berlin, Heidelberg

Abstract

We explore three commodity parallel architectures: multi-core CPUs, the Cell BE processor, and graphics processing units. We have implemented four algorithms on these three architectures: solving the heat equation, inpainting using the heat equation, computing the Mandelbrot set, and MJPEG movie compression. We use these four algorithms to exemplify the benefits and drawbacks of each parallel architecture.

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References

1.
IBM, Sony, Toshiba: Cell Broadband Engine programming handbook version 1.1 (2007)Google Scholar
2.
OpenMP Architecture Review Board: OpenMP application program interface version 2.5 (2005)Google Scholar
3.
Message Passing Interface Forum: MPI-2: Extensions to the message-passing interface (2003)Google Scholar
4.
Ohara, M., Inoue, H., Sohda, Y., Komatsu, H., Nakatani, T.: MPI microtask for programming the Cell Broadband Engine processor. IBM Systems Journal 45, 85–102 (2006)CrossRefGoogle Scholar
5.
Eichenberger, A., O’Brien, J., O’Brien, K., Wu, P., Chen, T., Oden, P., Prener, D., Shepherd, J., So, B., Sura, Z., Wang, A., Zhang, T., Zhao, P., Gschwind, M.: Optimizing compiler for the Cell processor. In: Intl. Conf. on Parallel Architectures and Compilation Techniques, Washington, DC, USA, pp. 161–172. IEEE Computer Society, Los Alamitos (2005)Google Scholar
6.
Bellens, P., Perez, J., Badia, R., Labarta, J.: CellSs: a programming model for the Cell BE architecture. In: SuperComputing 2006 (2006)Google Scholar
7.
Owens, J., Luebke, D., Govindaraju, N., Harris, M., Krüger, J., Lefohn, A., Purcell, T.: A survey of general-purpose computation on graphics hardware. Computer Graphics Forum 26, 80–113 (2007)CrossRefGoogle Scholar
8.
NVIDIA corporation: NVIDIA CUDA programming guide version 1.1 (2007)Google Scholar
9.
Buck, I., Foley, T., Horn, D., Sugerman, J., Houston, M., Hanrahan, P.: Brook for GPUs: Stream computing on graphics hardware (2004)Google Scholar
10.
AMD Corporation: AMD stream computing revision 1.3.0 (2008)Google Scholar
11.
McCool, M.: Data-parallel programming on the Cell BE and the GPU using the rapidmind development platform. In: GSPx Multicore Applications Conference (2006)Google Scholar
12.
Khronos OpenCL Working Group: The OpenCL specification 1.0 (2008)Google Scholar
13.
Shreiner, D., Woo, M., Neider, J., Davis, T.: OpenGL Architecture Review Board. OpenGL Programming Guide: The Official Guide to Learning OpenGL, 6th edn. Addison-Wesley, Reading (2007)Google Scholar
14.
Williams, S., Shalf, J., Oliker, L., Kamil, S., Husbands, P., Yelick, K.: The potential of the Cell processor for scientific computing. In: Computing Frontiers 2006 (2006)Google Scholar
15.
Hagen, T., Henriksen, M., Hjelmervik, J., Lie, K.A.: How to solve systems of conservation laws numerically using the graphics processor as a high-performance computational engine. In: Geometric Modelling, Numerical Simulation and Optimization: Industrial Mathematics at SINTEF. Springer, Heidelberg (2007)Google Scholar
16.
Hagen, T., Rahman, T.: GPU-based image inpainting using a TV-Stokes equation (2008) (preprint)Google Scholar
17.
Muta, H., Doi, M., Nakano, H., Mori, Y.: Multilevel parallelization on the Cell / B.E. for a motion JPEG 2000 encoding server. In: MULTIMEDIA 2007 (2007)Google Scholar
18.
IBM: Software development kit for multicore acceleration version 3.0 (2007)Google Scholar

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Authors and Affiliations

André Rigland Brodtkorb
- 1
Trond Runar Hagen
- 1
- 2

1.Dept. Appl. Math.SINTEFBlindern, OsloNorway
2.Centre of Mathematics for Applications (CMA)University of OsloNorway

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