Computer Generation of Efficient Software Viterbi Decoders

  • Frédéric de Mesmay
  • Srinivas Chellappa
  • Franz Franchetti
  • Markus Püschel
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5952)

Abstract

This paper presents a program generator for fast software Viterbi decoders for arbitrary convolutional codes. The input to the generator is a specification of the code and a single-instruction multiple-data (SIMD) vector length. The output is an optimized C implementation of the decoder that uses explicit Intel SSE vector instructions. At the heart of the generator is a small domain-specific language called VL to express the structure of the forward pass. Vectorization is done by rewriting VL expressions, which a compiler then translates into actual code in addition to performing further optimizations specific to the vector instruction set. Benchmarks show that the generated decoders match the performance of available expert hand-tuned implementations, while spanning the entire space of convolutional codes. An online interface to the generator is provided at www.spiral.net.

Keywords

Library generation high performance software vectorization domain-specific language Viterbi algorithm 

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References

  1. 1.
    Viterbi, A.: Error bounds for convolutional codes and an asymptotically optimum decoding algorithm. IEEE Transactions on Information Theory 13(2) (April 1967)Google Scholar
  2. 2.
    Gemmeke, T., Gansen, M., Noll, T.: Implementation of scalable power and area efficient high-throughput viterbi decoders. Solid-State Circuits 37(7) (July 2002)Google Scholar
  3. 3.
    Mitola III, J.: Software Radio Architecture. John Wiley & Sons, Chichester (2002)Google Scholar
  4. 4.
    Karn, P.: FEC library version 3.0.1 (August 2007), http://www.ka9q.net/code/fec/
  5. 5.
    Van Loan, C.: Computational frameworks for the fast Fourier transform. Society for Industrial and Applied Mathematics, Philadelphia (1992)MATHGoogle Scholar
  6. 6.
    Püschel, M., Moura, J.M.F., Johnson, J., Padua, D., Veloso, M., Singer, B., et al.: SPIRAL: Code generation for DSP transforms. Proc. of the IEEE 93(2) (2005)Google Scholar
  7. 7.
    Xiong, J., Johnson, J., Johnson, R., Padua, D.: SPL: a language and compiler for DSP algorithms. SIGPLAN Not. 36(5), 298–308 (2001)CrossRefGoogle Scholar
  8. 8.
    Franchetti, F., Voronenko, Y., Püschel, M.: FFT program generation for shared memory: SMP and multicore. In: Supercomputing, SC (2006)Google Scholar
  9. 9.
    Franchetti, F., Voronenko, Y., Püschel, M.: A rewriting system for the vectorization of signal transforms. In: Daydé, M., Palma, J.M.L.M., Coutinho, Á.L.G.A., Pacitti, E., Lopes, J.C. (eds.) VECPAR 2006. LNCS, vol. 4395, pp. 363–377. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  10. 10.
    Forney Jr., G.D.: The viterbi algorithm. Proc. of the IEEE 61(3) (March 1973)Google Scholar
  11. 11.
    Rader, C.: Memory management in a viterbi decoder. IEEE Transactions on Communications [legacy, pre - 1988] 29(9), 1399–1401 (1981)CrossRefGoogle Scholar
  12. 12.
    Franchetti, F., de Mesmay, F., McFarlin, D., Püschel, M.: Operator language: A program generation framework for fast kernels. In: IFIP Working Conference on Domain Specific Languages (DSL WC). LNCS, vol. 5658. Springer, Heidelberg (2009)Google Scholar
  13. 13.
    Feldman, J., Abou-Faycal, I., Frigo, M.: A fast maximum-likelihood decoder for convolutional codes. In: Proc. of Vehicular Technology Conference, pp. 371–375 (2002)Google Scholar
  14. 14.
    Fano, R.: A heuristic discussion of probabilistic decoding. IEEE Transactions on Information Theory 9(2), 64–74 (1963)CrossRefMathSciNetGoogle Scholar
  15. 15.
    Lawrie, D.: Access and alignment of data in an array processor. IEEE Transactions on Computers C-24(12), 1145–1155 (1975)CrossRefMathSciNetGoogle Scholar
  16. 16.
    Franchetti, F., Püschel, M.: Generating SIMD vectorized permutations. In: Hendren, L. (ed.) CC 2008. LNCS, vol. 4959, pp. 116–131. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  17. 17.
    Hekstra, A.: An alternative to metric rescaling in viterbi decoders. IEEE Transactions on Communications 37(11), 1220–1222 (1989)CrossRefMathSciNetGoogle Scholar
  18. 18.
    Chambers, W.: On good convolutional codes of rate 1/2, 1/3, and 1/4. In: Singapore ICCS/ISITA 1992. Communications on the Move, November 1992, vol. 2, pp. 750–754 (1992)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2010

Authors and Affiliations

  • Frédéric de Mesmay
    • 1
  • Srinivas Chellappa
    • 1
  • Franz Franchetti
    • 1
  • Markus Püschel
    • 1
  1. 1.Electrical and Computer EngineeringCarnegie Mellon UniversityPittsburghUSA

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