The Intel AES Instructions Set and the SHA-3 Candidates

  • Ryad Benadjila
  • Olivier Billet
  • Shay Gueron
  • Matt J. B. Robshaw
Conference paper

DOI: 10.1007/978-3-642-10366-7_10

Part of the Lecture Notes in Computer Science book series (LNCS, volume 5912)
Cite this paper as:
Benadjila R., Billet O., Gueron S., Robshaw M.J.B. (2009) The Intel AES Instructions Set and the SHA-3 Candidates. In: Matsui M. (eds) Advances in Cryptology – ASIACRYPT 2009. ASIACRYPT 2009. Lecture Notes in Computer Science, vol 5912. Springer, Berlin, Heidelberg

Abstract

The search for SHA-3 is now well-underway and the 51 submissions accepted for the first round reflected a wide variety of design approaches. A significant number were built around Rijndael/AES-based operations and, in some cases, the AES round function itself. Many of the design teams pointed to the forthcoming Intel AES instructions set, to appear on Westmere chips during 2010, when making a variety of performance claims. In this paper we study, for the first time, the likely impact of the new AES instructions set on all the SHA-3 candidates that might benefit. As well as distinguishing between those algorithms that are AES-based and those that might be described as AES-inspired, we have developed optimised code for all the former. Since Westmere processors are not yet available, we have developed a novel software technique based on publicly available information that allows us to accurately emulate the performance of these algorithms on the currently available Nehalem processor. This gives us the most accurate insight to-date of the potential performance of SHA-3 candidates using the Intel AES instructions set.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Ryad Benadjila
    • 1
  • Olivier Billet
    • 1
  • Shay Gueron
    • 2
    • 3
  • Matt J. B. Robshaw
    • 1
  1. 1.Orange LabsIssy les MoulineauxFrance
  2. 2.University of HaifaIsrael
  3. 3.Intel CorporationHaifaIsrael

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