Automated Design of Totally Self-Checking Sequential Circuits

  • Jerzy Greblicki
  • Jerzy Kotowski
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5717)

Abstract

In this paper methods of designing of a class of highly reliable digital circuit - Totally Self Checking Sequential Machines are presented. The main problem in TSC sequential machines (TSC SM) designing is synthesis TSC functional excitation circuit. Formal condition of ST property for both AND-OR and AND-AND-OR structures are presented. The description of design methodology of TSC SM is presented. Owing to our methods we can design TSC circuits in a fully automatic way.

Keywords

Fault tolerant systems totally self-checking circuits sequential circuits 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Jerzy Greblicki
    • 1
  • Jerzy Kotowski
    • 1
  1. 1.Institute of Computer Engineering, Control and RoboticsWrocław University of TechnologyWrocławPoland

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