Automated Design of Totally Self-Checking Sequential Circuits

  • Jerzy Greblicki
  • Jerzy Kotowski
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5717)


In this paper methods of designing of a class of highly reliable digital circuit - Totally Self Checking Sequential Machines are presented. The main problem in TSC sequential machines (TSC SM) designing is synthesis TSC functional excitation circuit. Formal condition of ST property for both AND-OR and AND-AND-OR structures are presented. The description of design methodology of TSC SM is presented. Owing to our methods we can design TSC circuits in a fully automatic way.


Fault tolerant systems totally self-checking circuits sequential circuits 


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    Diaz, M., et al.: Unified design of self-checking and fail-safe combinational circuits and sequential machines. IEEE Trans. Comput. C-28, 276–281 (1979)MathSciNetCrossRefzbMATHGoogle Scholar
  2. 2.
    Diaz, M., de Souza, J.M.: Design of self-checking microprogrammed controls. In: Digest of Papers 5th Int. FTCS, Paris, France, June 1975, pp. 137–142 (1975)Google Scholar
  3. 3.
    Greblicki, J.W.: Synthesis of sequential circuits using unordered codes. PhD thesis, Wroclaw University of Technology, Wroclaw (in polish) (October 2003)Google Scholar
  4. 4.
    Greblicki, J.W., Piestrak, S.J.: Design of totally self-checking code-disjoint synchronous sequential circuits. In: Hlavicka, J., Maehle, E., Pataricza, A. (eds.) EDDC 1999. LNCS, vol. 1667, pp. 250–266. Springer, Heidelberg (1999)Google Scholar
  5. 5.
    Greblicki, J.W.: CAD software for designing of totally self checking sequential circuits. In: DepCoS - RELCOMEX 2006, pp. 289–296. IEEE Comp. Society Press, Los Alamitos (2006)Google Scholar
  6. 6.
    Jha, N.K., Wang, S.-J.: Design and synthesis of self-checking VLSI circuits. IEEE Transactions on Computer–Aided Design of Integrated Circuits 12, 878–887 (1993)CrossRefGoogle Scholar
  7. 7.
    Lai, C.-S., Wey, C.-L.: An efficient output function partitioning algorithm reducing hardware overhead in self-checking circuits and systems. In: Proceedings 35th Midwest Symp. Circuits System, pp. 1538–1541 (1992)Google Scholar
  8. 8.
    Piestrak, S.J.: PLA implementation of totally self-checking circuits using m-out-of-n codes. In: Port Chester, N.Y. (ed.) Proceedings ICCD 1985, International Conference on Computer Design: VLSI in Computers, October 1-3, pp. 777–781 (1985)Google Scholar
  9. 9.
    Smith, J.E.: The design of totally self-checking check circuits for a class of unordered codes. J. Des. Autom. Fault-Tolerant Comput. 2, 321–342 (1977)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Jerzy Greblicki
    • 1
  • Jerzy Kotowski
    • 1
  1. 1.Institute of Computer Engineering, Control and RoboticsWrocław University of TechnologyWrocławPoland

Personalised recommendations