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We study the relation between logical contradictions such as p ∧ ¬p and structural contradictions such as p ∩ (p.q). Intuitively, we expect the two to be treated similarly, but they are not by PSL, nor by SVA. We provide a solution that treats both kinds of contradictions in a consistent manner. The solution reveals that not all structural contradictions are created equal: we must distinguish between them in order to preserve important characteristics of the logic. A happy result of our solution is that it provides the semantics over the natural alphabet 2 P , as opposed to the current semantics of PSL/SVA that use an inflated alphabet including the cryptic letters ⊤ and \(\bot\). We show that the complexity of model checking PSL/SVA is not affected by our proposed semantics.
KeywordsModel Check Atomic Proposition Propositional Formula Empty Word Strong View
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- 1.Accellera Property Specification Language Reference Manual Version 1.0 (January 2003)Google Scholar
- 2.Accellera Property Specification Language Reference Manual Version 1.1 (June 2004)Google Scholar
- 5.Ben-David, S., Bloem, R., Fisman, D., Griesmayer, A., Pill, I., Ruah, S.: Automata construction algorithms optimized for PSL (Deliverable 3.2/4). Technical report, Prosyd (2005)Google Scholar
- 6.Bustan, D., Fisman, D., Havlicek, J.: Automata construction for PSL. Technical Report MCS05-04, The Weizmann Institute of Science (May 2005)Google Scholar
- 8.Eisner, C., Fisman, D.: A Practical Introduction to PSL. Springer, Heidelberg (2006)Google Scholar
- 9.Eisner, C., Fisman, D., Havlicek, J.: A topological characterization of weakness. In: Proc. PODC 2005, pp. 1–8. ACM Press, New York (2005)Google Scholar
- 11.Eisner, C., Fisman, D., Havlicek, J., Mårtensson, J.: The ⊤,\(\bot\) approach to truncated semantics. Technical Report 2006.01, Accellera (May 2006)Google Scholar
- 17.IEEE Standard for Property Specification Language (PSL). IEEE Std 1850TM-2005, Annex B (2005)Google Scholar
- 18.IEEE Standard for SystemVerilog – Unified Hardware Design, Specification, and Verification Language. IEEE Std 1800TM-2005, Annex E (2005)Google Scholar