A Light-Weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures

  • Rainer Buchty
  • David Kramer
  • Mario Kicherer
  • Wolfgang Karl
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5455)


When targeting hardware accelerators and reconfigurable processing units, the question of programmability arises, i.e. how different implementations of individual, configuration-specific functions are provided. Conventionally, this is resolved either at compilation time with a specific hardware environment being targeted, by initialization routines at program start, or decision trees at run-time. Such technique are, however, hardly applicable to dynamically changing architectures. Furthermore, these approaches show conceptual drawbacks such as requiring access to source code and requiring upfront knowledge of future system configurations, as well as overloading the code with reconfiguration-related control routines.

We therefore present a low-overhead technique enabling on-demand resolving of individual functions; this technique can be applied in two different manners; we will discuss the benefits of the individual implementations and show how both approaches can be used to establish code compatibility between different heterogeneous, reconfigurable, and parallel architectures. Further we will show, that both approaches are exposing an insignificant overhead.


Function Pointer Function Resolution Function Switching Control Interface Runtime System 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 1.
    Advanced Micro Devices. AMD Fusion Whitepaper,
  2. 2.
    Hormati, A., Kudlur, M., Bacon, D., Mahlke, S., Rabbah, R.: Optimus: Efficient Realization of Streaming Applications on FPGAs. In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES) (to appear) (October 2008)Google Scholar
  3. 3.
    Becker, J., Brändle, K., Brinkschulte, U., Henkel, J., Karl, W., Köster, T., Wenz, M., Wörn, H.: Digital On-Demand Computing Organism for Real-Time Systems. In: Karl, W., Becker, J., Grobietsch, K.-E., Hochberger, C., Maehle, E. (eds.) Workshop Proceedings of the 19th International Conference on Architecture of Computing Systems (LNI P81), March 2006, pp. 230–245 (2006)Google Scholar
  4. 4.
    Khronos Group. Khronos OpenCL API Registry (December (2008),
  5. 5.
    Haase, J., Eschmann, F., Klauer, B., Waldschmidt, K.: The SDVM: A Self Distributing Virtual Machine for computer clusters. In: Müller-Schloer, C., Ungerer, T., Bauer, B. (eds.) ARCS 2004. LNCS, vol. 2981, pp. 9–19. Springer, Heidelberg (2004)CrossRefGoogle Scholar
  6. 6.
    Held, J., Bautista, J., Koehl, S.: From a Few Cores to Many: A Tera-scale Computing Research Overview. Research at Intel Whitepaper (2006),
  7. 7.
    Hofmann, A., Waldschmidt, K.: SDVMR: A Scalable Firmware for FPGA-based Multi-Core Systems-on-Chip. In: 9th Workshop on Parallel Systems and Algorithms (PASA 2008), Dresden, Germany, vol. LNI P-124, pp. 59–68. GI e.V. (January 2008)Google Scholar
  8. 8.
    Linderman, M.D., Collins, J.D., Wang, H., Meng, T.H.: Merge: a programming model for heterogeneous multi-core systems. In: ASPLOS XIII: Proceedings of the 13th international conference on Architectural support for programming languages and operating systems, pp. 287–296. ACM, New York (2008)CrossRefGoogle Scholar
  9. 9.
    Lindholm, T., Yellin, F.: The Java Virtual Machine Specification. Sun Microsystems, 2nd edn. (1999) ISBN 978-0201432947,
  10. 10.
    Jones, M.T.: Access the Linux kernel using the /proc filesystem. In: IBM developerWorks (2006),
  11. 11.
    Olukotun, K., et al.: Towards Pervasive Parallelism. In: Barcelona Multicore Workshop (BMW (June 2008),
  12. 12.
    Huang, S., Hormati, A., Bacon, D., Rabbah, R.: Liquid Metal: Object-Oriented Programming Across the Hardware/Software Boundary. In: Vitek, J. (ed.) ECOOP 2008. LNCS, vol. 5142, pp. 76–103. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  13. 13.
    The Santa Cruz Operation, Inc. System V Application Binary Interface (Edition 4.1) (1997),
  14. 14.
    Vassiliadis, S., Wong, S., Cotofana, S.D.: The MOLEN μ-coded Processor. In: Brebner, G., Woods, R. (eds.) FPL 2001. LNCS, vol. 2147, pp. 275–285. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  15. 15.
    Shukla, V.: Explore the Linux memory model. In: IBM developerWorks (2006),
  16. 16.
    Wang, P.H., Collins, J.D., Chinya, G.N., Jiang, H., Tian, X., Girkar, M., Yang, N.Y., Lueh, G.-Y., Wang, H.: EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system. SIGPLAN Not 42(6), 156–166 (2007)CrossRefGoogle Scholar
  17. 17.

Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Rainer Buchty
    • 1
  • David Kramer
    • 1
  • Mario Kicherer
    • 1
  • Wolfgang Karl
    • 1
  1. 1.Institut für Technische Informatik, Lehrstuhl für RechnerarchitekturUniversität Karlsruhe (TH)KarlsruheGermany

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