Advertisement

High Speed CPU Simulation Using LTU Dynamic Binary Translation

  • Daniel Jones
  • Nigel Topham
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5409)

Abstract

In order to increase the speed of dynamic binary translation based simulators we consider the translation of large translation units consisting of multiple blocks. In contrast to other simulators, which translate hot blocks or pages, the techniques presented in this paper profile the target program’s execution path at runtime. The identification of hot paths ensures that only executed code is translated whilst at the same time offering greater scope for optimization. Mean performance figures for the functional simulation of EEMBC benchmarks show the new simulation techniques to be at least 63% faster than basic block based dynamic binary translation.

Keywords

Basic Block Simulation Mode Control Flow Graph Total Simulation Time Strongly Connect Component 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Bartholomew, D.: QEMU: a Multihost, Multitarget Emulator. Linux Journal 2006(145), 3 (2006)Google Scholar
  2. 2.
    Bellard, F.: QEMU, a Fast and Portable Dynamic Translator. In: ATEC 2005: Proceedings of the USENIX Annual Technical Conference, p. 41. USENIX Association (2005)Google Scholar
  3. 3.
    Braun, G., Hoffmann, A., Nohl, A., Meyr, H.: Using Static Scheduling Techniques for the Retargeting of High Speed, Compiled Simulators for Embedded Processors from an Abstract Machine Description. In: ISSS 2001: Proceedings of the 14th International Symposium on Systems Synthesis, pp. 57–62. ACM Press, New York (2001)Google Scholar
  4. 4.
    Cmelik, B., Keppel, D.: Shade: A Fast Instruction-Set Simulator for Execution Profiling. In: SIGMETRICS 1994: Proceedings of the 1994 ACM SIGMETRICS Conference on Measurement and Modeling of Computer Systems, pp. 128–137. ACM Press, New York (1994)Google Scholar
  5. 5.
    Magnusson, P.S., Dahlgren, F., Grahn, H., Karlsson, M., Larsson, F., Lundholm, F., Moestedt, A., Nilsson, J., Stenstrm, P., Werner, B.: SimICS/sun4m: A Virtual Workstation. In: ATEC 1998: Proceedings of the Usenix Annual Technical Conference, pp. 119–130. USENIX Association (1998)Google Scholar
  6. 6.
    May, C.: Mimic: A Fast System/370 Simulator. In: SIGPLAN 1987: Papers of the Symposium on Interpreters and Interpretive Techniques, pp. 1–13. ACM Press, New York (1987)Google Scholar
  7. 7.
    Mills, C., Ahalt, S.C., Fowler, J.: Compiled Instruction Set Simulation. Journal Software, Practice and Experience 21(8), 877–889 (1991)CrossRefGoogle Scholar
  8. 8.
    Nohl, A., Braun, G., Schliebusch, O., Leupers, R., Meyr, H., Hoffmann, A.: A Universal Technique for Fast and Flexible Instruction-Set Architecture Simulation. In: DAC 2002: Proceedings of the 39th Conference on Design Automation, pp. 22–27. ACM Press, New York (2002)Google Scholar
  9. 9.
    Qin, W., D’Errico, J., Zhu, X.: A Multiprocessing Approach to Accelerate Retargetable and Portable Dynamic-Compiled Instruction-Set Simulation. In: CODES+ISSS 2006: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, pp. 193–198. ACM Press, New York (2006)CrossRefGoogle Scholar
  10. 10.
    Reshadi, M., Mishra, P., Dutt, N.: Instruction Set Compiled Simulation: A Technique for Fast and Flexible Instruction Set Simulation. In: DAC 2003: Proceedings of the 40th Conference on Design Automation, pp. 758–763. ACM Press, New York (2003)Google Scholar
  11. 11.
    Rosenblum, M., Herrod, S.A., Witchel, E., Gupta, A.: Complete Computer System Simulation: The SimOS Approach. Journal IEEE Parallel Distrib. Technol. 3(4), 34–43 (1995)CrossRefGoogle Scholar
  12. 12.
    Tarjan, R.: Depth-First Search and Linear Graph Algorithms. SIAM Journal on Computing 1(2), 146–160 (1972)MathSciNetCrossRefzbMATHGoogle Scholar
  13. 13.
    Topham, N., Jones, D.: High Speed CPU Simulation using JIT Binary Translation. In: MoBS 2007: Proceedings of the 3rd Annual Workshop on Modeling, Benchmarking and Simulation (2007)Google Scholar
  14. 14.
    Witchel, E., Rosenblum, M.: Embra: Fast and Flexible Machine Simulation. In: SIGMETRICS 1996: Proceedings of the 1996 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, pp. 68–79. ACM Press, New York (1996)Google Scholar
  15. 15.
    Zhu, J., Gajski, D.D.: A Retargetable, Ultra-Fast Instruction Set Simulator. In: DATE 1999: Proceedings of the Conference on Design, Automation and Test in Europe, p. 62. ACM Press, New York (1999)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Daniel Jones
    • 1
  • Nigel Topham
    • 1
  1. 1.Institute for Computing Systems Architecture School of InformaticsUniversity of EdinburghGreat Britain

Personalised recommendations