A Comparison of Evolvable Hardware Architectures for Classification Tasks

  • Kyrre Glette
  • Jim Torresen
  • Paul Kaufmann
  • Marco Platzner
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5216)

Abstract

We analyze and compare four different evolvable hardware approaches for classification tasks: An approach based on a programmable logic array architecture, an approach based on two-phase incremental evolution, a generic logic architecture with automatic definition of building blocks, and a specialized coarse-grained architecture with pre-defined building blocks. We base the comparison on a common data set and report on classification accuracy and training effort. The results show that classification accuracy can be increased by using modular, specialized classifier architectures. Furthermore, function level evolution, either with predefined functions derived from domain-specific knowledge or with functions that are automatically defined during evolution, also gives higher accuracy. Incremental and function level evolution reduce the search space and thus shortens the training effort.

Keywords

Logic Block Training Vector Maximum Detector Incremental Evolution Cartesian Genetic Programming 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Kyrre Glette
    • 1
  • Jim Torresen
    • 1
  • Paul Kaufmann
    • 2
  • Marco Platzner
    • 2
  1. 1.Department of InformaticsUniversity of OsloOsloNorway
  2. 2.University of PaderbornDepartment of Computer SciencePaderbornGermany

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