ICES 2008: Evolvable Systems: From Biology to Hardware pp 308-319 | Cite as
Evolving Variability-Tolerant CMOS Designs
Conference paper
Abstract
As the size of CMOS devices is approaching the atomic level, the increasing intrinsic device variability is leading to higher failure rates in conventional CMOS designs. In this paper, two approaches are proposed for evolving unconventional variability-tolerent CMOS designs: one uses a simple Genetic Algorithm, whilst the other uses Cartesian Genetic Programming. Both approaches successfully evolve unconventional designs for logic gates, whilst an inverter design also shows signs of variability-tolerance.
Keywords
Logic Gate Conventional Design Simple Genetic Algorithm Intrinsic Variation Cartesian Genetic Programming
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