Exploiting MOEA to Automatically Geneate Test Programs for Path-Delay Faults in Microprocessors

  • P. Bernardi
  • K. Christou
  • M. Grosso
  • M. K. Michael
  • E. Sánchez
  • M. Sonza Reorda
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4974)


This paper presents an innovative approach for the generation of test programs detecting path-delay faults in microprocessors. The proposed method takes advantage of the multiobjective implementation of a previously devised evolutionary algorithm and exploits both gate- and RT-level descriptions of the processor: the former is used to build Binary Decision Diagrams (BDDs) for deriving fault excitation conditions; the latter is used for the automatic generation of test programs able to excite and propagate fault effects, based on a fast RTL simulation. Experiments on an 8-bit microcontroller show that the proposed method is able to generate suitable test programs more efficiently compared to existing approaches.


MOEA path-delay testing microprocessor BDD 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • P. Bernardi
    • 1
  • K. Christou
    • 2
  • M. Grosso
    • 1
  • M. K. Michael
    • 2
  • E. Sánchez
    • 1
  • M. Sonza Reorda
    • 1
  1. 1.Dipartimento di Automatica e InformaticaPolitecnico di TorinoTorinoItaly
  2. 2.Department of Electrical and Computer EngineeringUniversity of CyprusNicosiaCyprus

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