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Model Checking Freeze LTL over One-Counter Automata

  • Stéphane Demri
  • Ranko Lazić
  • Arnaud Sangnier
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4962)

Abstract

We study complexity issues related to the model-checking problem for LTL with registers (a.k.a. freeze LTL) over one-counter automata. We consider several classes of one-counter automata (mainly deterministic vs. nondeterministic) and several syntactic fragments (restriction on the number of registers and on the use of propositional variables for control locations). The logic has the ability to store a counter value and to test it later against the current counter value. By introducing a non-trivial abstraction on counter values, we show that model checking LTL with registers over deterministic one-counter automata is PSpace-complete with infinite accepting runs. By constrast, we prove that model checking LTL with registers over nondeterministic one-counter automata is \(\Sigma_1^1\)-complete [resp. \(\Sigma_1^0\)-complete] in the infinitary [resp. finitary] case even if only one register is used and with no propositional variable. This makes a difference with the facts that several verification problems for one-counter automata are known to be decidable with relatively low complexity, and that finitary satisfiability for LTL with a unique register is decidable. Our results pave the way for model-checking LTL with registers over other classes of operational models, such as reversal-bounded counter machines and deterministic pushdown systems.

Keywords

Model Check Temporal Logic Propositional Variable Hybrid Logic Data Word 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Stéphane Demri
    • 1
  • Ranko Lazić
    • 3
  • Arnaud Sangnier
    • 1
    • 2
  1. 1.LSV, ENS Cachan, CNRS, INRIA 
  2. 2.EDF R&D 
  3. 3.Department of Computer ScienceUniversity of WarwickUK

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