A Hardware Packet Re-Sequencer Unit for Network Processors
Network Processors (NP) usually are designed as multi-processor systems with parallel packet processing. This parallelism may lead to flows with packets out-of-order when leaving the NP system. But packet reordering has a bad impact on network performance, especially when using the dominating TCP protocol. In this paper, we describe a Hardware Re-Sequencer Unit for Network Processors. Incoming packets will be tagged in the ingress path, preserving the packet order with flow granularity. An Aggregation Unit reorders the packet flows in the egress path if needed. In contrast to most other solutions the way of the packet through the NP system is dispensable, which enlarges design freedom in terms of e.g. load balancing. After explaining the general concept, a SystemC model is presented. Simulation results are used for dimensioning and a proof of concept with real traffic traces. General aspects concerning the implementation are discussed.
KeywordsHash Function Collision Rate Network Processor Processing Engine Trace File
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- 1.Shah, N.: Understanding Network Processors. Berkley Technical Report (September 2001)Google Scholar
- 2.Govind, S., Govindarajan, R., Kuri, J.: Packet Reordering in Network Processors. In: IPDPS 2007 (May 2007)Google Scholar
- 3.Laor, M., Gendel, L.: The Effect of Packet Reordering in a backbone Link on Application Throughput. IEEE Network (September/October 2002)Google Scholar
- 4.Cao, Z., Wang, Z., Zegura, E.: Performance of Hashing-Based Schemes for Internet Load Balancing. IEEE INFOCOM, Tel Aviv, Israel (March 2000)Google Scholar
- 5.Dittmann, G., Herkersdorf, A.: Network Processor Load Balancing for High-Speed Links. SPECTS 2002 (2002)Google Scholar
- 6.Shi, W., MacGregor, M.H., Gburzynski, P.: Load Balancing for Parallel Forwarding. IEEE Transactions on Networking 13(4) (August 2005)Google Scholar
- 7.Wu, B., et al.: A Practical Packet Reordering Mechanism with Flow Granularity for Parallelism Exploiting in Network Processors. In: IPDPS 2005(2005)Google Scholar
- 8.Ohlendorf, R., Herkersdorf, A., Wild, T.: FlexPath NP - A Network Processor Concept with Application-Driven Flexible Processing Paths. CODES+ISSS, Jersey City, USA (September 2005)Google Scholar
- 9.Libpcap homepage, http://www.tcpdump.org
- 10.MAWI Working Group Traffic Archive, http://tracer.csl.sony.co.jp/mawi/
- 11.CAIDA, traces of OC48 link at AMES Internet Exchange (AIX) (April 24, 2003), accessed via DatCat – Internet Data Measurement catalog, http://imdc.datacat.org
- 12.University of North Carolina at Chapel Hill, border link traces (September 25, 1999) accessed via DatCat – Internet Data Measurement catalog, http://imdc.datacat.org