Advertisement

Accelerating Large Graph Algorithms on the GPU Using CUDA

  • Pawan Harish
  • P. J. Narayanan
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4873)

Abstract

Large graphs involving millions of vertices are common in many practical applications and are challenging to process. Practical-time implementations using high-end computers are reported but are accessible only to a few. Graphics Processing Units (GPUs) of today have high computation power and low price. They have a restrictive programming model and are tricky to use. The G80 line of Nvidia GPUs can be treated as a SIMD processor array using the CUDA programming model. We present a few fundamental algorithms – including breadth first search, single source shortest path, and all-pairs shortest path – using CUDA on large graphs. We can compute the single source shortest path on a 10 million vertex graph in 1.5 seconds using the Nvidia 8800GTX GPU costing $600. In some cases optimal sequential algorithm is not the fastest on the GPU architecture. GPUs have great potential as high-performance co-processors.

Keywords

Graphic Processing Unit Large Graph Adjacency List Parallel Random Access Machine Single Source Short Path 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Nineth DIMACS implementation challange - Shortest paths http://www.dis.uniroma1.it/challenge9/download.shtml
  2. 2.
    Bader, D.A., Madduri, K.: Designing multithreaded algorithms for breadth-first search and st-connectivity on the Cray MTA-2. In: ICPP, pp. 523–530 (2006)Google Scholar
  3. 3.
    Bader, D.A., Madduri, K.: Parallel algorithms for evaluating centrality indices in real-world networks. In: ICPP 2006. Proceedings of the 2006 International Conference on Parallel Processing, pp. 539–550. IEEE Computer Society Press, Los Alamitos (2006)Google Scholar
  4. 4.
    Cho, J.-D., Raje, S., Sarrafzadeh, M.: Fast approximation algorithms on maxcut, k-coloring, and k-color ordering for vlsi applications. IEEE Transactions on Computers 47(11), 1253–1266 (1998)CrossRefMathSciNetGoogle Scholar
  5. 5.
    Fan, Z., Qiu, F., Kaufman, A., Yoakum-Stover, S.: GPU cluster for high performance computing. In: SC 2004. Proceedings of the 2004 ACM/IEEE conference on Supercomputing, p. 47. IEEE Computer Society, Los Alamitos (2004)Google Scholar
  6. 6.
    Krüger, J., Westermann, R.: Linear algebra operators for GPU implementation of numerical algorithms. ACM Transactions on Graphics (TOG) 22(3), 908–916 (2003)CrossRefGoogle Scholar
  7. 7.
    Lefohn, A., Kniss, J.M., Strzodka, R., Sengupta, S., Owens, J.D.: Glift: Generic, efficient, random-access GPU data structures. ACM Transactions on Graphics 25(1), 60–99 (2006)CrossRefGoogle Scholar
  8. 8.
    Lengauer, T., Tarjan, R.E.: A fast algorithm for finding dominators in a flowgraph. ACM Trans. Program. Lang. Syst. 1(1), 121–141 (1979)zbMATHCrossRefGoogle Scholar
  9. 9.
    Micikevicius, P.: General parallel computation on commodity graphics hardware: Case study with the all-pairs shortest paths problem. PDPTA, 1359–1365 (2004)Google Scholar
  10. 10.
    Narayanan, P.J.: Single Source Shortest Path Problem on Processor Arrays. In: Proceedings of the Fourth IEEE Symposium on the Frontiers of Massively Parallel Computing, pp. 553–556 (1992)Google Scholar
  11. 11.
    Narayanan, P.J.: Processor Autonomy on SIMD Architectures. In: Proceedings of the Seventh International Conference on Supercomputing, pp. 127–136 (1993)Google Scholar
  12. 12.
    Nepomniaschaya, A.S., Dvoskina, M.A.: A simple implementation of dijkstra’s shortest path algorithm on associative parallel processors. Fundam. Inf. 43(1-4), 227–243 (2000)zbMATHGoogle Scholar
  13. 13.
    Owens, J.D., Sengupta, S., Horn, D.: Assessment of Graphic Processing Units (GPUs) for Department of Defense (DoD) Digital Signal Processing (DSP) Applications. Technical Report ECE-CE-2005-3, Department of Electrical and Computer Engineering, University of California, Davis (October 2005)Google Scholar
  14. 14.
    Wu, W., Heng, P.A.: A hybrid condensed finite element model with GPU acceleration for interactive 3D soft tissue cutting: Research Articles. Comput. Animat. Virtual Worlds 15(3-4), 219–227 (2004)CrossRefGoogle Scholar
  15. 15.
    Zhao, Y., Han, Y., Fan, Z., Qiu, F., Kuo, Y.-C., Kaufman, A.E., Mueller, K.: Visual simulation of heat shimmering and mirage. IEEE Transactions on Visualization and Computer Graphics 13(1), 179–189 (2007)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2007

Authors and Affiliations

  • Pawan Harish
    • 1
  • P. J. Narayanan
    • 1
  1. 1.Center for Visual Information Technology, International Institute of Information Technology HyderabadIndia

Personalised recommendations