AMT: A Property-Based Monitoring Tool for Analog Systems

  • Dejan Nickovic
  • Oded Maler
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4763)

Abstract

In this paper we describe AMT, a tool for monitoring temporal properties of continuous signals. We first introduce Stl/Psl, a specification formalism based on the industrial standard language Psl and the real-time temporal logic Mitl, extended with constructs that allow describing behaviors of real-valued variables. The tool automatically builds property observers from an Stl/Psl specification and checks, in an offline or incremental fashion, whether simulation traces satisfy the property. The AMT tool is validated through a Flash memory case-study.

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References

  1. [ABG+00]
    Abarbanel, Y., Beer, I., Glushovsky, L., Keidar, S., Wolfsthal, Y.: FoCs: Automatic Generation of Simulation Checkers from Formal Specifications. In: Emerson, E.A., Sistla, A.P. (eds.) CAV 2000. LNCS, vol. 1855, pp. 538–542. Springer, Heidelberg (2000)CrossRefGoogle Scholar
  2. [ACM02]
    Asarin, E., Caspi, P., Maler, O.: Timed Regular Expressions. The Journal of the ACM 49, 172–206 (2002)CrossRefMathSciNetGoogle Scholar
  3. [AD94]
    Alur, R., Dill, D.L.: A Theory of Timed Automata. Theoretical Computer Science 126, 183–235 (1994)MATHCrossRefMathSciNetGoogle Scholar
  4. [ADF+06]
    Asarin, E., Dang, T., Frehse, G., Girard, A., Le Guernic, C., Maler, O.: Recent Progress in Continuous and Hybrid Reachability Analysis. In: CACSD (2006)Google Scholar
  5. [AFH96]
    Alur, R., Feder, T., Henzinger, T.A.: The Benefits of Relaxing Punctuality. Journal of the ACM 43, 116–146 (1996) (first published in PODC 1991)MATHCrossRefMathSciNetGoogle Scholar
  6. [Dru00]
    Drusinsky, D.: The Temporal Rover and the ATG Rover. In: Havelund, K., Penix, J., Visser, W. (eds.) SPIN Model Checking and Software Verification. LNCS, vol. 1885, pp. 323–330. Springer, Heidelberg (2000)CrossRefGoogle Scholar
  7. [DSS+05]
    D’Angelo, B., Sankaranarayanan, S., Sanchez, C., Robinson, W., Finkbeiner, B., Sipma, H.B., Mehrotra, S., Manna, Z.: LOLA: Runtime Monitoring of Synchronous Systems. In: TIME 2005, pp. 166–174 (2005)Google Scholar
  8. [FGP06]
    Fainekos, G., Girard, A., Pappas, G.: Temporal Logic Verification Using Simulation. In: Asarin, E., Bouyer, P. (eds.) FORMATS 2006. LNCS, vol. 4202, pp. 171–186. Springer, Heidelberg (2006)CrossRefGoogle Scholar
  9. [GO01]
    Gastin, P., Oddoux, D.: Fast LTL to Büchi Automata Translation. In: Berry, G., Comon, H., Finkel, A. (eds.) CAV 2001. LNCS, vol. 2102, pp. 53–65. Springer, Heidelberg (2001)Google Scholar
  10. [GPVW95]
    Gerth, R., Peled, D.A., Vardi, M.Y., Wolper, P.: Simple On-the-fly Automatic Verification of Linear Temporal Logic. In: PSTV, pp. 3–18 (1995)Google Scholar
  11. [HFE04]
    Havlicek, J., Fisman, D., Eisner, C.: Basic results on the semantics of Accellera PSL 1.1 foundation language, Technical Report 2004.02, Accelera (2004)Google Scholar
  12. [HR01]
    Havelund, K., Rosu, G.: Java PathExplorer - a Runtime Verification Tool. In: Proc. ISAIRAS 2001 (2001)Google Scholar
  13. [KC06a]
    Konsentini, C., Caspi, P.: Sampling and Voting in Hybrid Computing Systems. In: Hespanha, J.P., Tiwari, A. (eds.) HSCC 2006. LNCS, vol. 3927, Springer, Heidelberg (2006)Google Scholar
  14. [KLS+02]
    Kim, M., Lee, I., Sammapun, U., Shin, J., Sokolsky, O.: Monitoring, Checking, and Steering of Real-time Systems. In: Proc. RV 2002. ENTCS vol. 70(4) (2002)Google Scholar
  15. [Koy90]
    Koymans, R.: Specifying Real-time Properties with Metric Temporal Logic. Real-time Systems 2, 255–299 (1990)CrossRefGoogle Scholar
  16. [MMP92]
    Maler, O., Manna, Z., Pnueli, A.: From Timed to Hybrid Systems. In: Huizing, C., de Bakker, J.W., Rozenberg, G., de Roever, W.-P. (eds.) Real-Time: Theory in Practice. LNCS, vol. 600, pp. 447–484. Springer, Heidelberg (1992)CrossRefGoogle Scholar
  17. [MN04]
    Maler, O., Nickovic, D.: Monitoring Temporal Properties of Continuous Signals. In: Lakhnech, Y., Yovine, S. (eds.) FORMATS 2004 and FTRTFT 2004. LNCS, vol. 3253, pp. 152–166. Springer, Heidelberg (2004)Google Scholar
  18. [NMF+06]
    Nickovic, D., Maler, O., Fedeli, A., Daglio, P., Lena, D.: Analog Case Study, PROSYD Deliverable D3.4/2 (2006), http://www.prosyd.org/twiki/pub/Public/DeliverablePageWP3/prosyd3.4_2.pdf
  19. [MP95]
    Manna, Z., Pnueli, A.: Temporal Verification of Reactive Systems: Safety. Springer, Heidelberg (1995)Google Scholar
  20. [SB00]
    Somenzi, F., Bloem, R.: Efficient Büchi automata from LTL formulae. In: Emerson, E.A., Sistla, A.P. (eds.) CAV 2000. LNCS, vol. 1855, pp. 248–263. Springer, Heidelberg (2000)CrossRefGoogle Scholar
  21. [VW86]
    Vardi, M.Y., Wolper, P.: An Automata-theoretic Approach to Automatic Program Verification. In: LICS 1986, pp. 322–331 (1986)Google Scholar
  22. [Y97]
    Yovine, S.K.: A Verification Tool for Real-time Systems. International Journal of Software Tools for Technology Transfer 1, 123–133 (1997)MATHCrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2007

Authors and Affiliations

  • Dejan Nickovic
    • 1
  • Oded Maler
    • 1
  1. 1.Verimag, 2 Av. de Vignate, 38610 GièresFrance

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