Workcraft: A Static Data Flow Structure Editing, Visualisation and Analysis Tool
Reliable high-level modeling constructs are crucial to the design of efficient asynchronous circuits. Concepts such as static data flow structures (SDFS) considerably facilitate the design process by separating the circuit structure and functionality from the lower-level implementation details.
Aside from providing a more abstract, higher level view, SDFS allow for efficient circuit analysis that is done by converting it to a Petri Net preserving behavioural equivalence. Once the equivalent Petri Net is obtained, existing theoretical and tool base can be applied to perform the model verification.
However, recent advances in SDFS design were largely theoretical. There are no practical software tools available which would allow working with different SDFS models in a consistent way and provide means for their analysis and comparison.
This paper presents a tool which aims to provide a common, cross-platform environment to assist with aforementioned tasks. The tool offers a GUI-based framework for visual editing, real-time simulation, animation and extendable analysis features for different SDFS types. The models themselves, as well as the supporting tools, are implemented as plug-ins.
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- 1.Extensible Markup Language (XML) - http://www.w3.org/XML/
- 2.JOGL API project - https://jogl.dev.java.net/
- 3.Scalable Vector Graphics - http://www.w3.org/Graphics/SVG/
- 4.The Jython Project - http://www.jython.org/
- 5.The Python Programming Language - http://www.python.org/
- 6.Ampalam, M., Singh, M.: Counterflow pipelining: architectural support for preemption in asynchronous systems using anti-tokens. In: Proc. International Conference Computer-Aided Design (ICCAD) (November 2006)Google Scholar
- 7.Best, E., Grundmann, B.: PEP - more than a Petri net tool. In: Proc. Tools and Algorithms for the Construction and Analysis of Systems (TACAS), Springer, Heidelberg (1995)Google Scholar
- 8.Brej, C.: Early output logic and anti-tokens. PhD thesis, Dept. of Computer Science, University of Manchester (2005)Google Scholar
- 9.Khomenko, V.: Model Checking Based on Prefixes of Petri Net Unfoldings. PhD thesis, University of Newcastle upon Tyne, School of Computing Science (2003)Google Scholar
- 11.Poliakov, I., Sokolov, D., Yakovlev, A.: Software requirements analysis for asynchronous circuit modelling and simulation tool. Technical Report NCL-EECE-MSD-TR-2007-118, University of Newcastle (2006)Google Scholar
- 12.Sokolov, D., Poliakov, I., Yakovlev, A.: Asynchronous data path models. In: 7th International Conference on Application of Concurrency to System Design (to appear 2007)Google Scholar
- 13.Sparsø, J., Furber, S. (eds.): Principles of Asynchronous Circuit Design: A Systems Perspective (2001)Google Scholar
- 14.Morrison, R., Stemple, D.W.: Software - Practice and Experience. In: Linguistic Reflection in Java, pp. 1045–1077. John Wiley & Sons, New York (1998)Google Scholar
- 15.Vogler, W., Semenov, A.L., Yakovlev, A.: Unfolding and finite prefix for nets with read arcs. In: International Conference on Concurrency Theory, pp. 501–516 (1998)Google Scholar
- 16.Yakovlev, A., Kishinevsky, M., Kondratyev, A., Lavagno, L., Pietkiewicz-Koutny, M.: Formal Methods in System Design. In: On the Models for Asynchronous Circuit Behaviour with OR Causality, pp. 189–233. Kluwer Academic Publishers, Boston (1996)Google Scholar