Improvement of ANNs Performance to Generate Fitting Surfaces for Analog CMOS Circuits
One of the typical applications of neural networks is based on their ability to generate fitting surfaces. However, for certain problems, error specifications are very restrictive, and so, the performance of these networks must be improved. This is the case of analog CMOS circuits, where models created must provide an accuracy which some times is difficult to achieve using classical techniques. In this paper we describe a modelling method for such circuits based on the combination of classical neural networks and electromagnetic techniques. This method improves the precision of the fitting surface generated by the neural network and keeps the training time within acceptable limits.
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