Numerical Simulation of Static Noise Margin for a Six-Transistor Static Random Access Memory Cell with 32nm Fin-Typed Field Effect Transistors

  • Yiming Li
  • Chih-Hong Hwang
  • Shao-Ming Yu
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4490)


We in this paper for the first time explore the static noise margin (SNM) of a six-transistor (6T) static random access memory (SRAM) cell with nanoscale silicon-on-insulator (SOI) fin-typed field effect transistors (FinFETs). The SNM is calculated with respect to the supply voltage, operating temperature, and cell ratio by performing a three-dimensional mixed-mode simulation. To include the quantum mechanical effect, the density-gradient equation is simultaneously solved in the coupled device and circuit equations. The standard deviation (σ SNM ) of SNM versus device’s channel length is computed, based upon the design of experiment and response surface methodology. Compared with the result of SNM for SRAM with 32nm planar metal-oxide-semiconductor field effect transistors, SRAM with SOI FinFETs quantitatively exhibits higher SNM and lower σ SNM . Improvement of characteristics resulting from good channel controllability implies that SRAM cells fabricated with FinFETs continuously maintains cell stability in sub-32nm technology nodes.


FinFET SRAM modeling and simulation computational statistics 


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Copyright information

© Springer Berlin Heidelberg 2007

Authors and Affiliations

  • Yiming Li
    • 1
  • Chih-Hong Hwang
    • 1
  • Shao-Ming Yu
    • 2
  1. 1.Department of Communication Engineering, National Chiao Tung University, Hsinchu 300Taiwan
  2. 2.Department of Computer Science, National Chiao Tung University, Hsinchu 300Taiwan

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