Hardware Design of an Adaptive Neuro-fuzzy Network with On-Chip Learning Capability

  • Tzu-Ping Kao
  • Chun-Chang Yu
  • Ting-Yu Chen
  • Jeen-Shing Wang
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4492)

Abstract

This paper aims for the development of the digital circuit of an adaptive neuro-fuzzy network with on-chip learning capability. The on-chip learning capability was realized by a backpropagation learning circuit for optimizing the network parameters. To maximize the throughput of the circuit and minimize its required resources, we proposed to reuse the computational results in both feedforward and backpropagation circuits. This leads to a simpler data flow and the reduction of resource consumption. To verify the effectiveness of the circuit, we implemented the circuit in an FPGA development board and compared the performance with the neuro-fuzzy system written in a MATLAB® code. The experimental results show that the throughput of our neuro-fuzzy circuit significantly outperforms the NF network written in a MATLAB® code with a satisfactory learning performance.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Jin, W.W., Jin, D.M., Zhang, X.: LSI Design and Implementation of a Fuzzy Logic Controller for Engine Idle Speed. In: Proc. of 7th IEEE Int’l. Conf. on Solid-State and Integrated Circuits Technology, vol. 3, pp. 2067–2070 (2004)Google Scholar
  2. 2.
    Marchesi, M., Orlandi, G., Piazza, F., Pollonara, L., Uncini, A.: Multi-layer Perceptrons with Discrete Weights. In: Int’l. Joint Conf. on Neural Networks, vol. 2, pp. 623–630 (1990)Google Scholar
  3. 3.
    Reyneri, L.M.: Implementation Issues of Neuro-Fuzzy Hardware: Going Toward HW/SW Codesign. IEEE Trans. Neural Networks 14, 176–179 (2003)CrossRefGoogle Scholar
  4. 4.
    Yi, Y., Vilathgamuwa, D.W., Rahman, M.A.: Implementation of an Artificial-Neural-Network-Based Real-Time Adaptive Controller for an Interior Permanent-Magnet Motor Drive. IEEE Trans. Industry Applications 39, 96–104 (2003)CrossRefGoogle Scholar
  5. 5.
    Kamio, T., Tanaka, S., Morisue, M.: Backpropagation Algorithm for Logic Oriented Neural Networks. In: Proc. of the IEEE Int’l. Joint Conf. on Neural Networks, vol. 2, pp. 123–128 (2000)Google Scholar
  6. 6.
    Girones, R.G., Salcedo, A.M.: Systolic Implementation of a Pipelined On-Line Back-propagation. In: Proc. of the 7th Int. Conf. on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, pp. 387–394 (1999)Google Scholar
  7. 7.
    Hwang, C.T., Lee, J.H., Hsu, Y.C.: A Formal Approach to the Scheduling Problem in High Level Synthesis. IEEE Trans. Computer-Aided Design 10, 464–475 (1991)CrossRefGoogle Scholar

Copyright information

© Springer Berlin Heidelberg 2007

Authors and Affiliations

  • Tzu-Ping Kao
    • 1
  • Chun-Chang Yu
    • 1
  • Ting-Yu Chen
    • 1
  • Jeen-Shing Wang
    • 1
  1. 1.Department of Electrical Engineering, National Cheng Kung University, Tainan 701, TaiwanR.O.C

Personalised recommendations