Combining Flash Memory and FPGAs to Efficiently Implement a Massively Parallel Algorithm for Content-Based Image Retrieval

  • Rayan Chikhi
  • Steven Derrien
  • Auguste Noumsi
  • Patrice Quinton
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4419)


With ever larger and more affordable storage capabilities, individuals and companies can now collect huge amounts of multimedia data, especially images. Searching such databases is still an open problem, known as content-based image retrieval (CBIR). In this paper, we present a hardware architecture based on FPGAs which aims at speeding-up visual CBIR.Our architecture is based on the unique combination of reconfigurable resources combined to Flash memory, and allows for a speed-up of 45 as compared to existing software solutions.


Image Database Query Image Distance Computation Local Descriptor Hardware Architecture 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Berlin Heidelberg 2007

Authors and Affiliations

  • Rayan Chikhi
    • 1
  • Steven Derrien
    • 2
  • Auguste Noumsi
    • 3
  • Patrice Quinton
    • 4
  1. 1.ENS Cachan, antenne de Bretagne – Bruz CedexFrance
  2. 2.IRISA/Université de Rennes 1 – 35042 Rennes CedexFrance
  3. 3.IRISA/Université de Douala – Daouala, Cameroun 
  4. 4.IRISA/ENS Cachan, antenne de Bretagne – Bruz CedexFrance

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