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Synthesis of Regular Expressions Targeting FPGAs: Current Status and Open Issues

  • João Bispo
  • Ioannis Sourdis
  • João M. P. Cardoso
  • Stamatis Vassiliadis
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4419)

Abstract

This paper presents an overview regarding the synthesis of regular expressions targeting FPGAs. It describes current solutions and a number of open issues. Implementation of regular expressions can be very challenging when performance is critical. Software implementations may not be able to satisfy performance requirements and thus dedicated hardware engines have to be used. In the later case, automatic synthesis tools are of paramount importance to achieve fast prototyping of regular expression engines. As a case study, experimental results are presented, for FPGA implementations of the regular expressions included in the rule-set of a Network Intrusion Detection System (NIDS), Bleeding Edge, obtained using a state-of-the-art synthesis approach.

Keywords

Clock Cycle Regular Expression Character Class Input String FPGA Implementation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Berlin Heidelberg 2007

Authors and Affiliations

  • João Bispo
    • 1
  • Ioannis Sourdis
    • 2
  • João M. P. Cardoso
    • 1
  • Stamatis Vassiliadis
    • 2
  1. 1.IST/INESC-ID, LisboaPortugal
  2. 2.Computer Engineering, TU DelftThe Netherlands

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