Evaluating the Impact of Thread Escape Analysis on a Memory Consistency Model-Aware Compiler

  • Chi-Leung Wong
  • Zehra Sura
  • Xing Fang
  • Kyungwoo Lee
  • Samuel P. Midkiff
  • Jaejin Lee
  • David Padua
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4339)


The widespread popularity of languages allowing explicitly parallel, multi-threaded programming, e.g. Java and C#, have focused attention on the issue of memory model design. The Pensieve Project is building a compiler that will enable both language designers to prototype different memory models, and optimizing compilers to adapt to different memory models. Among the key analyses required to implement this system are thread escape analysis, i.e. detecting when a referenced object is accessible by more than one thread, delay set analysis, and synchronization analysis.

In this paper, we evaluate the impact of different escape analysis algorithms on the effectiveness of the Pensieve system when both delay set analysis and synchronization analysis are used. Since both analyses make use of results of escape analyses, their precison and cost is dependent on the precision of the escape analysis algorithm. It is the goal of this paper to provide a quantitative evalution of this impact.


Memory Access Memory Model Strongly Connect Component Benchmark Program Synchronization Analysis 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 1.
    SPEC JBB 2000, Benchmark,
  2. 2.
    SPEC JVM Client98 Suitem,
  3. 3.
    The Java Grande Forum Multi-threaded Benchmarks,
  4. 4.
    Adve, S.V., Gharachorloo, K.: Shared memory consistency models: A tutorial. IEEE Computer, 66–76 (December 1996)Google Scholar
  5. 5.
    Arnold, M., Fink, S., Grove, D., Hind, M., Sweeney, P.: Adaptive optimization in the Jalapeño JVM. In: Proc. ACM SIGPLAN Conference on Object-Oriented Programming and Systems, Languages, and Applications (OOPSLA) 2000, Minneapolis, MN (October 2000)Google Scholar
  6. 6.
    Bogda, J., Holzle, U.: Removing unnecessary synchronization in java. In: Proceedings of the 14th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications, pp. 35–46. ACM Press, New York (1999)CrossRefGoogle Scholar
  7. 7.
    Alpern, B., et al.: The Jalapeño virtual machine. IBM System Journal 39(1) (February 2000)Google Scholar
  8. 8.
    Gharachorloo, K., et al.: Memory consistency and event ordering in scalable shared-memory multiprocessors. In: Proceedings of The 17th Annual International Symposium on Computer Architecture (ISCA), May 1990, pp. 15–26 (1990)Google Scholar
  9. 9.
    Burke, M.G., et al.: The Jalapeño Dynamic Optimizing Compiler for Java. In: Proceedings of the 1999 ACM Java Grande Conference, Palo Alto, CA, USA, June 1999, pp. 129–141 (1999)Google Scholar
  10. 10.
    Fang, X., Lee, J., Midkiff, S.P.: Automatic fence insertion for shared memory processing. In: 2003 ACM International Conference on Supercomputing (June 2003)Google Scholar
  11. 11.
    Fang, X., Lee, J., Midkiff, S.P.: An optimizing and retargetable fence insertion algorithm. Technical Report ECE-HPCLab-033002, High Performance Computing Lab., School of Electrical and Computer Engineering, Purdue University (2003)Google Scholar
  12. 12.
    Hartley, S.: Concurrent Programming: the Java Programming Language. Oxford University Press, Oxford (1998)Google Scholar
  13. 13.
    Hill, M.D.: Multiprocessors should support simple memory-consistency models. IEEE Computer (August 1998)Google Scholar
  14. 14.
    Krishnamurthy, A., Yelick, K.: Analyses and optimizations for shared address space programs. Journal of Parallel and Distributed Computing 38, 139–144 (1996)CrossRefGoogle Scholar
  15. 15.
    Lamport, L.: How to make a multiprocessor computer that correctly executes multiprocess programs. IEEE Transactions on Computers C-28(9), 690–691 (1979)zbMATHCrossRefGoogle Scholar
  16. 16.
    Lea, D.: Concurrent Programming in Java. Addison Wesley, Reading (1999),
  17. 17.
    Lea, D., Lea, D.: Concurrent Programming in Java: Design Principles and Patterns. Addison-Wesley Longman Publishing Co., Inc., Boston (1996)Google Scholar
  18. 18.
    Ruf, E.: Effective synchronization removal for java. In: Conference on Programming Languages, Design, and Implementation, PLDI (2000)Google Scholar
  19. 19.
    Scheurich, C., Dubois, M.: Correct memory operation of cache-based multiprocessors. In: Proc. of the 14th Annual Int’l. Symp. on Computer Architecture (ISCA 1987), pp. 234–243 (1987)Google Scholar
  20. 20.
    Shasha, D., Snir, M.: Efficient and correct execution of parallel programs that share memory. ACM Transactions on Programming Languages and Systems 10(2), 282–312 (1988)CrossRefGoogle Scholar
  21. 21.
    Sura, Z., Fang, X., Wong, C.-L., Midkiff, S.P., Lee, J., Padua, D.: Compiler techniques for high performance sequentially consistent java programs. In: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Chicago IL (2005)Google Scholar
  22. 22.
    Sura, Z.N.: Analyzing Threads for Shared Memory Consistency. PhD thesis, University of Illinois at Urbana-Champaign (2004)Google Scholar
  23. 23.
    Wong, C.-L.: Thread Escape Analysis for a Memory Consistency Model-aware Compiler. PhD thesis, University of Illinois at Urbana-Champaign (2005)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Chi-Leung Wong
    • 1
  • Zehra Sura
    • 2
  • Xing Fang
    • 3
  • Kyungwoo Lee
    • 3
  • Samuel P. Midkiff
    • 3
  • Jaejin Lee
    • 4
  • David Padua
    • 5
  1. 1.KAI Software LabIntel Americas, Inc.ChampaignUSA
  2. 2.IBM Thomas J. Watson Research CenterYorktown HeightsUSA
  3. 3.Purdue UniversityWest LafayetteUSA
  4. 4.Seoul National UniversitySeoulKorea
  5. 5.Dept.of Computer ScienceUniversity of Illinois at Urbana-ChampaignUSA

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