Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms

  • Keith D. Cooper
  • Anshuman Dasgupta
  • Jason Eckhardt
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4339)


Techniques for global register allocation via graph coloring have been extensively studied and widely implemented in compiler frameworks. This paper examines a particular variant – the Callahan Koblenz allocator – and compares it to the Chaitin-Briggs graph coloring register allocator. Both algorithms were published in the 1990’s, yet the academic literature does not contain an assessment of the Callahan-Koblenz allocator. This paper evaluates and contrasts the allocation decisions made by both algorithms. In particular, we focus on two key differences between the allocators:

Spill code: The Callahan-Koblenz allocator attempts to minimize the effect of spill code by using program structure to guide allocation and spill code placement. We evaluate the impact of this strategy on allocated code.

Copy elimination: Effective register-to-register copy removal is important for producing good code. The allocators use different techniques to eliminate these copies. We compare the mechanisms and provide insights into the relative performance of the contrasting techniques.

The Callahan-Koblenz allocator may potentially insert extra branches as part of the allocation process. We also measure the performance overhead due to these branches.


Graph Coloring Physical Register Register Copy Tile Tree Register Allocation 


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    Bergner, P., Dahl, P., Engebretsen, D., O’Keefe, M.T.: Spill Code Minimization via Interference Region Spilling. In: SIGPLAN Conference on Programming Language Design and Implementation, pp. 287–295 (1997)Google Scholar
  2. 2.
    Bernstein, D., Goldin, D.Q., Golumbic, M.C., Krawczyk, H., Mansour, Y., Nahshon, I., Pinter, R.Y.: Spill Code Minimization Techniques for Optimizing Compilers. In: SIGPLAN Conference on Programming Language Design and Implementation, pp. 258–263 (1989)Google Scholar
  3. 3.
    Briggs, P.: Register Allocation via Graph Coloring. Technical Report TR92- 183, Rice University, 24 (1992)Google Scholar
  4. 4.
    Briggs, P., Cooper, K.D., Harvey, T.J., Taylor Simpson, L.: Practical Improvements to the Construction and Destruction of Static Single Assignment. Form. Software - Practice and Experience 28(8), 859–881 (1998)CrossRefGoogle Scholar
  5. 5.
    Briggs, P., Cooper, K.D., Torczon, L.: Improvements to Graph Coloring Register Allocation. ACM Transactions on Programming Languages and Systems 16(3), 428–455 (1994)CrossRefGoogle Scholar
  6. 6.
    Callahan, D., Koblenz, B.: Register Allocation via Hierarchical Graph Coloring. SIGPLAN 26(6), 192–203 (1991)CrossRefGoogle Scholar
  7. 7.
    Chaitin, G.J.: Register Allocation and Spilling via Graph Coloring. In: SIGPLAN 1982 (1982)Google Scholar
  8. 8.
    Chaitin, G.J., Auslander, M.A., Chandra, A.K., Cocke, J., Hopkins, M.E., Markstein, P.W.: Register Allocation via Coloring. Computer Languages 6, 45–57 (1981)CrossRefGoogle Scholar
  9. 9.
    Cooper, K.D., Simpson, L.T.: Live range Splitting in a Graph Coloring Register Allocator. In: Proceedings of the International Compiler Construction Conference (March 1998)Google Scholar
  10. 10.
    George, L., Appel, A.W.: Iterated register coalescing. ACM Trans. Program. Lang. Syst. 18(3), 300–324 (1996)CrossRefGoogle Scholar
  11. 11.
    Kim, S., Moon, S.-M., Park, J., Ebciolu, K.: Unroll-based register coalescing. In: ICS 2000: Proceedings of the 14th international conference on supercomputing. ACM Press, New York (2000)Google Scholar
  12. 12.
    Knobe, K., Zadeck, K.: Register Allocation Using Control Trees. Technical Report CS-92-13, Brown University, Department of Computer Science (March 1992)Google Scholar
  13. 13.
    Koseki, A., Komatsu, H., Nakatani, T.: Preference-directed graph coloring. In: Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation, pp. 33–44. ACM Press, New York (2002)CrossRefGoogle Scholar
  14. 14.
    Lattner, C., Adve, V.: LLVM: A Compilation Framework for Lifelong Program Analysis and Transformation. In: Proceedings of the 2004 International Symposium on Code Generation and Optimization (CGO 2004) (March 2004)Google Scholar
  15. 15.
    Geoffrey Lowney, P., Freudenberger, S.M., Karzes, T.J., Lichtenstein, W.D., Nix, R.P., O’Donnell, J.S., Ruttenberg, J.C.: The Multiflow Trace Scheduling Compiler. The Journal of Supercomputing 7(1-2), 51–142 (1993)CrossRefGoogle Scholar
  16. 16.
    Lueh, G.-Y., Gross, T., Adl-Tabatabai, A.-R.: Fusion-based register allocation. ACM Transactions on Programming Languages and Systems 22(3), 431–470 (2000)CrossRefGoogle Scholar
  17. 17.
    Norris, C., Pollock, L.L.: Register Allocation over the Program Dependence Graph. In: SIGPLAN Conference on Programming Language Design and Implementation, pp. 266–277 (1994)Google Scholar
  18. 18.
    Sethi, R.: Complete Register Allocation Problems. In: Proceedings of the fifth annual ACM symposium on Theory of computing, pp. 182–195. ACM, New York (1973)CrossRefGoogle Scholar
  19. 19.
    Wu, Q.: Register Allocation via Hierarchical Graph Coloring. Master’s thesis, Michigan Technological University (1996)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Keith D. Cooper
    • 1
  • Anshuman Dasgupta
    • 1
  • Jason Eckhardt
    • 1
  1. 1.Department of Computer ScienceRice University 

Personalised recommendations