Concepts for Autonomous Control Flow Checking for Embedded CPUs
In this paper, we introduce new concepts and methods for checking the correctness of control flow instructions during the execution of programs in embedded CPUs. Detecting and avoiding the execution of faulty control flow instructions is a problem of growing importance w.r.t. reliability and security. On the other hand, hardware cost overheads and an easy integration into the design flow are of utmost important for cost sensitive embedded systems. Our proposed methodology is able to monitor all direct jumps and branches as well as calls and returns form subroutines autonomously during program execution. Furthermore, we propose and evaluate an implementation of an autonomous checker unit which is closely coupled to the processor and can detect and even avoid the execution of a faulty control flow instruction. Upon detection of a faulty instruction, we propose a method to refetch and reexecute the incorrect jump or branch instruction. Other benefits of this novel approach are that the application code must not be changed or augmented by signatures or additional instructions, and that there is no measurable performance impact in terms of execution latency. From the user point of view, our approach is completely transparent to a program developer.
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