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Ladder Metamodeling and PLC Program Validation through Time Petri Nets

  • Darlam Fabio Bender
  • Benoît Combemale
  • Xavier Crégut
  • Jean Marie Farines
  • Bernard Berthomieu
  • François Vernadat
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5095)

Abstract

Ladder Diagram (LD) is the most used programming language for Programmable Logical Controllers (PLCs). A PLC is a special purpose industrial computer used to automate industrial processes. Bugs in LD programs are very costly and sometimes are even a threat to human safety. We propose a model driven approach for formal verification of LD programs through model-checking. We provide a metamodel for a subset of the LD language. We define a time Petri net (TPN) semantics for LD programs through an ATL model transformation. Finally, we automatically generate behavioral properties over the LD models as LTL formulae which are then checked over the generated TPN using the model-checkers available in the Tina toolkit. We focus on race condition detection.

Keywords

Race Condition Ladder Diagram Boolean Equation Natural Language Requirement Instruction List 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Darlam Fabio Bender
    • 1
    • 2
  • Benoît Combemale
    • 1
  • Xavier Crégut
    • 1
  • Jean Marie Farines
    • 2
  • Bernard Berthomieu
    • 3
  • François Vernadat
    • 3
  1. 1.Institut de Recherche en Informatique de Toulouse (CNRS UMR 5505)Université de Toulouse.France
  2. 2.Departamento de Automação e SistemasFederal University of Santa Catarina.FlorianopolisBrazil
  3. 3.Laboratoire d’Analyse et d’Archicteture des Systemes (CNRS)Université de Toulouse.France

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