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Scheduling DAGs on Grids with Copying and Migration

  • Israel Hernandez
  • Murray Cole
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4967)

Abstract

Effective task scheduling mechanisms for Grids must address the dynamic and heterogeneous nature of the system by allowing rescheduling and migration of tasks in reaction to significant variations in resource characteristics. Migration may be invoked when the cost of the migration itself is outweighed by the global time saved due to execution at the new site. We extend our previous results in this area by considering the maintenance of a collection of reusable copies of the results of completed tasks. We show how to reuse such copies to improve overall application makespan. We present the Grid Task Positioning with Copying facilities GTP/c system. We compare the performance of GTP/c with our previous model GTP and DLS/sr, an adaptive version of the dynamic level scheduling static method.

Keywords

Task Graph Migration Cost Place Task Adaptive Version Exit Node 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Hernandez, I., Cole, M.: Reactive Grid Scheduling of DAG Applications. In: Proceedings of 25th IASTED (PDCN), pp. 92–97. Acta Press (2007)Google Scholar
  2. 2.
    Sakellariou, R., Zhao, H.: A low-cost rescheduling policy for efficient mapping of workflows on grid systems. Scientific Prog. SPR 12(4), 253–262 (2004)Google Scholar
  3. 3.
    Topcuoglu, H.: Performance-Effective and Low-Complexity Task Scheduling for Heterogeneous Computing. Trans. Parallel Dist.Syst. 13(3), 260–274 (2002)CrossRefGoogle Scholar
  4. 4.
    The Simgrid project, http://simgrid.gforge.inria.fr/
  5. 5.
  6. 6.
    Sih, G., Lee, E.: A compile-time scheduling heuristic for interconnection-constrained heterogeneous processor architectures. Trans.Parallel Dist.Syst. 4(2), 175–187 (1993)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Israel Hernandez
    • 1
  • Murray Cole
    • 1
  1. 1.Institute for Computing Systems Architecture School of InformaticsUniversity of Edinburgh 

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