Advertisement

FPGA Viruses

  • Ilija Hadžić
  • Sanjay Udani
  • Jonathan M. Smith
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1673)

Abstract

Programmable logic is widely used, for applications ranging from field-upgradable subsystems to advanced uses such as reconfigurable computing platforms. Users can thus implement algorithms which are largely executed by a general-purpose CPU, but may be selectively accelerated with special purpose hardware. In this paper, we show that programmable logic devices unfortunately open another avenue for malicious users to implement the hardware analogue of a computer virus. We begin with an outline of the general properties of FPGAs that create risks. We then explain how to exploit these risks, and demonstrate through experiments that they are exploitable even in the absence of detailed layout information. We prove our point by demonstrating the first known FPGA virus and its effect on the current absorbed by the device, namely that the device is destroyed. We close by outlining possible methods of defense and point out the similarities and differences between FPGA and software viruses.

Keywords

Programmable Logic Supply Current Logic Element Logic Block Computer Virus 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Allke, P.: Configuration Issues: Power-up, Volatility, Security, Battery Back-up. Xilinx Inc., Application Note 092, Version 1.1 (November 1997)Google Scholar
  2. 2.
    Altera, Corporation. Altera Device Package Information - Data Sheet, 7 edn. (March 1998)Google Scholar
  3. 3.
    Altera, Corporation. Flex 8000 Programmable Logic Family - Data Sheet, 9.11 edition (September 1998)Google Scholar
  4. 4.
    Annapolis Micro Systems Inc., Information on the Web, http://www.annapmicro.com
  5. 5.
    Arnold, J.M., Buell, D.A., Davis, E.G.: Splash 2. In: Proceedings of the 4th Annual ACM Symposium on Parallel Algorithms and Architectures, June 1992, pp. 316–324 (1992)Google Scholar
  6. 6.
    Borriello, B., et al.: The Triptych FPGA architecture. IEEE Transactions on VLSI Systems 3(4), 491–501 (1995)CrossRefGoogle Scholar
  7. 7.
    Cohen, F.: Computer Viruses, Theory and Experiments. Computers and Security 6, 22–35 (1987)CrossRefGoogle Scholar
  8. 8.
    Graham, P., Nelson, B.: A Hardware Genetic Algorithm for the Traveling Salesman Problem on SPLASH 2. In: Proceedings of FPL 1995, September 1995, pp. 352–361 (1995)Google Scholar
  9. 9.
    Burns, J., et al.: A Dynamic Reconfiguration Run-Time System. In: Proceedings of FCCM 1997 (April 1997)Google Scholar
  10. 10.
    Lechner, E., Guccione, S.A.: The Java Environment of Reconfigurable Computing. In: Proceedings of FPL 1997, September 1997, pp. 284–293 (1997)Google Scholar
  11. 11.
    McGregor, G., Robinson, D., Lysaght, P.: A Hardware/Software Co-design Environment for Reconfigurable Logic Systems. In: Proceedings of FPL 1998, September 1998, pp. 258–267 (1998)Google Scholar
  12. 12.
    Mackinlay., P.I., et al.: Riley-2: A Flexible Platform for Codesign and Dynamic Reconfigurable Computing Research. In: Proceedings FPL 1997, September 1997, pp. 91–100 (1997)Google Scholar
  13. 13.
    Shanley, T., Anderson, D.: PCI System Architecture, 3rd edn. Addison Wesley, Reading (1995)Google Scholar
  14. 14.
    Smith, D., Bhatia, D.: Race: Reconfigurable and adaptive computing environment. In: Proceedings of FPL 1996 (September 1996)Google Scholar
  15. 15.
    Virtual Computer Corporation. Information on the Web, http://www.vcc.com
  16. 16.
    Mangione-Smith, W.H., et al.: Seeking Solutions in Configurable Computing. IEEE Computer Magazine, 38–43 (December 1997)Google Scholar
  17. 17.
    Zetex Semiconductors Current Sensors, http://www.zetex.com/sensors.htm

Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Ilija Hadžić
    • 1
  • Sanjay Udani
    • 1
  • Jonathan M. Smith
    • 1
  1. 1.Distributed Systems LaboratoryUniversity of Pennsylvania 

Personalised recommendations