A TCP/IP Based Multi-device Programming Circuit
This paper describes a lightweight Field Programmable Gate Array (FPGA) circuit design that supports the simultaneous programming of multiple devices at different locations throughout the Internet. This task is accomplished by a single TCP/IP socket connection. Packets are routed through a series of devices to be programmed. At each location, a hardware circuit extracts reconfiguration information from the TCP/IP byte stream and programs other devices at that location. A novel feature of the Multi-Device Programmer is that it does not use a microprocessor or even a soft-core processor. All of the TCP/IP protocol processing and packet forwarding operations are handled directly in FPGA logic and state machines. This system is robust against lost and reordered packets, and has been successfully demonstrated in the laboratory.
KeywordsField Programmable Gate Array Source Programmer Circuit Component Multiple Device Packet Processing
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- 1.Braun, F., Lockwood, J., Waldvogel, M.: Reconfigurable Router Modules Using Network Protocol Wrappers. In: Proceedings of Field-Programmable Logic and Applications, Belfast, Northern Ireland, August 2001, pp. 254–263 (2001)Google Scholar
- 2.Lockwood, J.W., Naufel, N., Turner, J.S., Taylor, D.E.: Reprogrammable Network Packet Processing on the Field Programmable Port Extender (FPX). In: ACM International Symposium on Field Programmable Gate Arrays (FPGA 2001), Monterey, CA, USA, Febuary 2001, pp. 87–93 (2001)Google Scholar
- 3.Schuehler, D.V., Lockwood, J.: TCP-Splitter: A TCP/IP Flow Monitor in Reconfigurable Hardware. In: Proceedings of Symposium on High Performance Interconnects (HotI 2002), Stanford, CA, USA, August 2002, pp. 127–131 (2002)Google Scholar