Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs
This paper presents the design and implementation of a novel architecture for FIR filters on Xilinx Virtex FPGAs. The architecture is particularly useful for handling the problem of signal boundaries filtering, which occurs in finite length signal processing (e.g. image processing). It cleverly exploits the Shift Register Logic (SRL) component of the Virtex family in order to implement the necessary complex data scheduling, leading to considerable area savings compared to the conventional implementation (based on a hard router), with no speed penalty. Our architecture uses bit parallel arithmetic and is fully scalable and parameterisable. A case study based on the implementation of the standard low filter of the Daubechies-8 wavelet on Xilinx Virtex-E FPGAs is presented.
KeywordsFinite Impulse Response Finite Impulse Response Filter Signal Boundary Boundary Processing Canonic Sign Digit
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- 1.Proakis. J.G., Manolakis.D.G.: Introduction to Digital Signal Processing. McMillan Publishing, USA (1989)Google Scholar
- 2.Pirsch, P.: Architectures for Digital Signal Processing. John Wiley & Sons, Chichester (1999)Google Scholar
- 3.Vetterli, M., Kovacevic, M.: Wavelets and Subband Coding. Prentice Hall, New Jersey (1995)Google Scholar
- 4.Smith, M.J.T., Eddins, S.: Analysis/Synthesis techniques for subband image coding. IEEE Trans On Acoustics, Speech and Signal Processing, 1446–1456 (August 1990)Google Scholar
- 5.Chakrabarti, C.: A DWT based encoder architecture for symmetrically extended images. In: Proceedings of the International Symposium on Circuits and Systems (1999)Google Scholar
- 6.Benkrid, A., Benkrid, K., Crookes, D.: Design and Implementation of a Novel Architecture for Symmetric FIR filters with Boundary Handling on Xilinx Virtex FPGAs. In: IEEE Conference on Field-Programmable Technology (FPT 2002), December 16 (2002)Google Scholar
- 8.Parhi, K.K.: VLSI Digital Signal Processing Systems: Design and Implementation. John Wiley & Sons, Chichester (1999)Google Scholar