Track Placement: Orchestrating Routing Structures to Maximize Routability

  • Katherine Compton
  • Scott Hauck
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2778)


The design of a routing channel for an FPGA is a complex process requiring a careful balance of flexibility with silicon efficiency. With a growing move towards embedding FPGAs into SoC designs, and the new opportunity to automatically generate FPGA architectures, this problem is even more critical. The design of a routing channel requires determining the number of routing tracks, the length of the wires in those tracks, and the positioning of the breaks between wires on the tracks. This paper focuses on the last problem, the placement of breaks in tracks to maximize overall flexibility. Our optimal algorithm for track placement finds a best solution provided the problem meets a number of restrictions. Our relaxed algorithm is without restrictions, and finds solutions on average within 1.13% of optimal.


Diversity Score Track Length Signal Length Wire Length Local Track 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Katherine Compton
    • 1
  • Scott Hauck
    • 2
  1. 1.Northwestern UniversityEvanstonUSA
  2. 2.University of WashingtonSeattleUSA

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