FPGA Based High Density Spiking Neural Network Array
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Pulsed neural networks can be applied to the design of dense arrays using minimum hardware resources in the interconnection among neurons. Using statistical saturation in pulse frequency coded neurons, a minimum size hardware neuron can be implemented. The proposed neuron is compact enough to be included in large arrays. The presented architecture has additional interesting characteristics like unrestricted topology and scalability. In this paper, the design and implementation of a high density spiking neural array is presented.
KeywordsInstantaneous Frequency External Memory Dense Array Spike Neural Network Pulse Frequency Modulation
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- 1.Schoenauer, T., Atasoy, S., Mehrtash, N., Klar, H.: Simulation of a Digital Neuro-Chip for Spiking Neural Networks. In: International Joint Conference on Neural Networks (IJCNN), Como, Italy (July 2000)Google Scholar