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MATLAB/Simulink Based Methodology for Rapid-FPGA-Prototyping

  • Miroslav Líčko
  • Jan Schier
  • Milan Tichý
  • Markus Kühl
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2778)

Abstract

The paper is focused on rapid prototyping for FPGA using the high-level environment of MATLAB/Simulink. An approach using combination of the Xilinx System Generator (XSG) and Handel-C is reviewed. A design flow to minimize HDL coding is considered.

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References

  1. 1.
    HSLA homepage, Dept. of Signal Processing, ÚTIA AV ČR, Prague, Czech Republic, available online: http://www.utia.cas.cz/ZS/home.php?ids=hsla
  2. 2.
    Coleman, J.N., Chester, E., Softley, C.I., Kadlec, J.: Arithmetic of the European Logarithmic Microprocessor. IEEE Trans. Comput. Special Edition on Computer Arithmetic 49(7), 702–715, and erratum  49(10), 1152 (2000)Google Scholar
  3. 3.
    Xilinx Inc., Xilinx System Generator for DSP, available online: http://www.xilinx.com/xlnx/xil_prodcat_product.jsp?title=system_generator
  4. 4.
    Celoxica Ltd., Handel-C available onoine: http://www.celoxica.com
  5. 5.
    RECONF Project homepage: IST programme 2002-34016, available online: http://www.reconf.org

Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Miroslav Líčko
    • 1
    • 2
  • Jan Schier
    • 1
    • 2
  • Milan Tichý
    • 1
    • 2
  • Markus Kühl
    • 3
  1. 1.Department of Signal ProcessingInstitute of Information Theory and AutomationPragueCzech Republic
  2. 2.Center for Applied Cybernetics, Department of Control Systems, Faculty of Electrical EngineeringCzech Technical UniversityPragueCzech Republic
  3. 3.Dept. of Electronic Systems and MicrosystemsFZI Forschungszentrum InformatikKarlsruheGermany

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