Using Split Queues to Improve the Performance of Parallel Switch

  • Xiaofeng Hu
  • Zhigang Sun
  • Xicheng Lu
  • Jinshu Su
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2834)


Parallel switch scales well with the growth of port density and line rate. PSIQC (Parallel Switch based on Input-Queued Crossbar) is a parallel switch that is scalable and simple to implement. But it needs large capacity high-speed memories to store cells, and the average cell latency is high under heavy load. This paper presents a revised version of PSIQC based on split queues that is initialed as SQ-PSIQC (Split Queued Parallel Switch based on Input-Queued Crossbar), and its scheduling algorithm SQ-RRDS (Split Queued Round Robin and Deterministic Sequence). SQ-PSIQC not only has all of the original characteristics, but also solves the two above-mentioned problems. In SQ-PSIQC the memory buffers are required to operate only at 1/m of the line rate, where m is the number of the middle switches. The simulation results show that SQ-PSIQC performs better than PSIQC in the average latency and throughput under any load, especially heavy load.


Time Slot Output Port Heavy Load Input Port Switch Module 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Xiaofeng Hu
    • 1
  • Zhigang Sun
    • 1
  • Xicheng Lu
    • 1
  • Jinshu Su
    • 1
  1. 1.School of ComputerNational University of Defense TechnologyChangshaP.R. China

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