A Functional Approach to the Formal Specification of Networks on Chip

  • Julien Schmaltz
  • Dominique Borrione
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3312)

Abstract

We present a functional approach, based on the ACL2 logic, for the specification of system on a chip communication architectures. Our decomposition of the communications allows the method to be modular for both system definition and validation. When performed in the context of the ACL2 logic, all the definitions and theorems are not only reusable, but also constitute an executable and proven valid specification for the system. We illustrate the approach on a state of the art network on chip: the Octagon. We prove that messages travel over this network without being modified and eventually reach their expected destination.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Roesner, W.: What is Beyond the RTL Horizon for Microprocessor and System Design. In: Geist, D., Tronci, E. (eds.) CHARME 2003. LNCS, vol. 2860, pp. 1–1. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  2. 2.
    Kaufmann, M., Manolios, P.: J Strother Moore: Computer-Aided Reasoning: An Approach. Kluwer Academic Publishers, Dordrecht (2000)Google Scholar
  3. 3.
    Karim, F., Nguyen, A., Dey, S.: An Interconnect Architecture For Networking Systems On Chip. IEEE Micro, 36–45 (September-October 2002)Google Scholar
  4. 4.
    Karim, F., Nguyen, A., Dey, S., Rao, R.: On-Chip Communication Architecture for OC-768 Network Processor. Design Automation Conference (2001)Google Scholar
  5. 5.
    Rowson, J.A., Sangiovanni-Vincentelli, A.: Interface-Based Design. Design Automation Conference (1997)Google Scholar
  6. 6.
    Schmaltz, J.: Functional Specification and Validation of the Octagon Network on Chip Using the ACL2 Theorem Prover. TIMA Technical Report, ISRN TIMA-RR–04/01/02–FR (2004)Google Scholar
  7. 7.
  8. 8.
    Strother Moore, J.: A Formal Model of Asynchronous Communication and Its Use in Mechanically Verifying a Biphase Mark Protocol. Formal Aspects of Computing (1993)Google Scholar
  9. 9.
    Emerson, E.A., Kahlon, V.: Rapid Parameterized Model Checking of Snoopy Cache Coherence Protocols. In: Garavel, H., Hatcliff, J. (eds.) TACAS 2003. LNCS, vol. 2619, pp. 144–159. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  10. 10.
    Havelung, K., Shankar, N.: Experiments in Theorem Proving and Model Checking for Protocol Verification. In: Gaudel, M.-C., Woodcock, J.C.P. (eds.) FME 1996. LNCS, vol. 1051. Springer, Heidelberg (1996)Google Scholar
  11. 11.
    Roychoudhury, A., Mitra, T., Karri, S.R.: Using Formal Techniques to Debug the AMBA System-on-Chip Bus Protocol. In: Proc. of the Design Automation and Test in Europe (DATE 2003) Conference, pp. 828–833 (2003)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Julien Schmaltz
    • 1
  • Dominique Borrione
    • 1
  1. 1.TIMA Laboratory, VDS GroupJoseph Fourier UniversityGrenoble CedexFrance

Personalised recommendations