Integrating Formal Verification with Murφ of Distributed Cache Coherence Protocols in FAME Multiprocessor System Design

  • Ghassan Chehaibar
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3235)

Abstract

Flexible Architecture for Multiple Environments (FAME) is Bull architecture for large symmetrical multiprocessors based on Intel’s Itanium(r) 2 family, which is used in Bull NovaScale(r) servers series. A key point in the development of this distributed shared memory architecture is the definition of its cache coherence protocol. This paper reports experiences and results of integrating formal verification of FAME cache coherence protocol, on 4 successive versions of this architecture. The goal is to find protocol definition bugs (not implementation) in the early phases of the design, focusing on: cache coherency, data integrity and deadlock-freeness properties. We have performed modeling and verification using Murφ tool and language, because of its easiness of use and its efficient state reduction techniques. The analysis of the results shows that this approach is cost-effective, and in spite of the state explosion problem, it has helped us in finding hard-to-simulate protocol bugs, before the implementation is far ahead.

Keywords

Formal Verification Cache Coherence State Explosion Cache Coherence Protocol Error Trace 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
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Copyright information

© IFIP International Federation for Information Processing 2004

Authors and Affiliations

  • Ghassan Chehaibar
    • 1
  1. 1.BULLPlatforms Hardware R&DLes Clayes Sous BoisFrance

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