Intellectual Property Protection for RNS Circuits on FPGAs

  • Luis Parrilla
  • Encarnación Castillo
  • Antonio García
  • Antonio Lloris
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3203)

Abstract

A new procedure for Intellectual Property Protection (IPP) of circuits based on the residue number system (RNS) and implemented over FPL devices is presented. The aim is to protect the author rights in the development and distribution of reusable modules (IP cores) by means of an electronic signature embedded within the design. The presented protection scheme is oriented to circuits based on the RNS but can be easily extended to systems implemented on programmable devices. As an example, a 128-bit signature is introduced into a CIC filter without affecting performance and negligible area increase.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Luis Parrilla
    • 1
  • Encarnación Castillo
    • 1
  • Antonio García
    • 1
  • Antonio Lloris
    • 1
  1. 1.Department of Electronics and Computer TechnologyUniversity of GranadaGranadaSpain

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