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A Survey of Regular Model Checking

  • Parosh Aziz Abdulla
  • Bengt Jonsson
  • Marcus Nilsson
  • Mayank Saksena
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3170)

Abstract

Regular model checking is being developed for algorithmic verification of several classes of infinite-state systems whose configurations can be modeled as words over a finite alphabet. Examples include parameterized systems consisting of an arbitrary number of homogeneous finite-state processes connected in a linear or ring-formed topology, and systems that operate on queues, stacks, integers, and other linear data structures. The main idea is to use regular languages as the representation of sets of configurations, and finite-state transducers to describe transition relations. In general, the verification problems considered are all undecidable, so the work has consisted in developing semi-algorithms, and decidability results for restricted cases. This paper provides a survey of the work that has been performed so far, and some of its applications.

Keywords

Model Check Transition Relation Transitive Closure Safety Property Reachability Analysis 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. [ABJ98]
    Abdulla, P.A., Bouajjani, A., Jonsson, B.: On-the-fly analysis of systems with unbounded, lossy fifo channels. In: Y. Vardi, M. (ed.) CAV 1998. LNCS, vol. 1427, pp. 305–318. Springer, Heidelberg (1998)CrossRefGoogle Scholar
  2. [AJMd02]
    Abdulla, P.A., Jonsson, B., Mahata, P., d’Orso, J.: Regular tree model checking. In: Brinksma, E., Larsen, K.G. (eds.) CAV 2002. LNCS, vol. 2404, p. 555. Springer, Heidelberg (2002)CrossRefGoogle Scholar
  3. [AJN+04]
    Abdulla, P.A., Jonsson, B., Nilsson, M., d’Orso, J., Saksena, M.: Regular model checking for MSO + LTL. In: Proc. 16th Int. Conf. on Computer Aided Verification (to appear, 2004)Google Scholar
  4. [AJNd02]
    Abdulla, P.A., Jonsson, B., Nilsson, M., d’Orso, J.: Regular model checking made simple and efficient. In: Brim, L., Jančar, P., Křetínský, M., Kucera, A. (eds.) CONCUR 2002. LNCS, vol. 2421, pp. 116–130. Springer, Heidelberg (2002)CrossRefGoogle Scholar
  5. [AJNd03]
    Abdulla, P.A., Jonsson, B., Nilsson, M., d’Orso, J.: Algorithmic improvements in regular model checking. In: Hunt Jr., W.A., Somenzi, F. (eds.) CAV 2003. LNCS, vol. 2725, pp. 236–248. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  6. [BCMD92]
    Burch, J.R., Clarke, E.M., McMillan, K.L., Dill, D.L.: Symbolic model checking: 1020 states and beyond. Information and Computation 98, 142–170 (1992)MathSciNetCrossRefMATHGoogle Scholar
  7. [BEM97]
    Bouajjani, A., Esparza, J., Maler, O.: Reachability Analysis of Pushdown Automata: Application to Model Checking. In: Mazurkiewicz, A., Winkowski, J. (eds.) CONCUR 1997. LNCS, vol. 1243. Springer, Heidelberg (1997)Google Scholar
  8. [BG96]
    Boigelot, B., Godefroid, P.: Symbolic verification of communication protocols with infinite state spaces using QDDs. In: Alur, R., Henzinger, T.A. (eds.) CAV 1996. LNCS, vol. 1102, pp. 1–12. Springer, Heidelberg (1996)CrossRefGoogle Scholar
  9. [BGWW97]
    Boigelot, B., Godefroid, P., Willems, B., Wolper, P.: The power of QDDs. In: Proc. of the Fourth International Static Analysis Symposium. LNCS. Springer, Heidelberg (1997)Google Scholar
  10. [BH97]
    Bouajjani, A., Habermehl, P.: Symbolic reachability analysis of fifochannel systems with nonregular sets of configurations. In: Degano, P., Gorrieri, R., Marchetti-Spaccamela, A. (eds.) ICALP 1997. LNCS, vol. 1256. Springer, Heidelberg (1997)Google Scholar
  11. [BHV04]
    Bouajjani, A., Habermehl, P., Vojnar, T.: Abstract regular model checking. In: Alur, R., Peled, D.A. (eds.) CAV 2004. LNCS, vol. 3114, pp. 372–386. Springer, Heidelberg (2004) (to appear)CrossRefGoogle Scholar
  12. [BJNT00]
    Bouajjani, A., Jonsson, B., Nilsson, M., Touili, T.: Regular model checking. In: Emerson, E.A., Sistla, A.P. (eds.) CAV 2000. LNCS, vol. 1855, pp. 403–418. Springer, Heidelberg (2000)CrossRefGoogle Scholar
  13. [BK98]
    Basin, D.A., Klarlund, N.: Automata based symbolic reasoning in hardware verification. Formal Methods in Systems Design 13(3), 255–288 (1998)CrossRefGoogle Scholar
  14. [BLW03]
    Boigelot, B., Legay, A., Wolper, P.: Iterating transducers in the large. In: Hunt Jr., W.A., Somenzi, F. (eds.) CAV 2003. LNCS, vol. 2725, pp. 223–235. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  15. [BLW04]
    Boigelot, B., Legay, A., Wolper, P.: Omega-regular model checking. In: Jensen, K., Podelski, A. (eds.) TACAS 2004. LNCS, vol. 2988, pp. 561–575. Springer, Heidelberg (2004)CrossRefGoogle Scholar
  16. [BT02]
    Bouajjani, A., Touili, T.: Extrapolating Tree Transformations. In: Brinksma, E., Larsen, K.G. (eds.) CAV 2002. LNCS, vol. 2404, p. 539. Springer, Heidelberg (2002)CrossRefGoogle Scholar
  17. [BW94]
    Boigelot, B., Wolper, P.: Symbolic verification with periodic sets. In: Dill, D.L. (ed.) CAV 1994. LNCS, vol. 818, pp. 55–67. Springer, Heidelberg (1994)CrossRefGoogle Scholar
  18. [Cau92]
    Caucal, D.: On the regular structure of prefix rewriting. Theoretical Computer Science 106(1), 61–86 (1992)MathSciNetCrossRefMATHGoogle Scholar
  19. [CES86]
    Clarke, E.M., Emerson, E.A., Sistla, A.P.: Automatic verification of finite-state concurrent systems using temporal logic specification. ACM Trans. on Programming Languages and Systems 8(2), 244–263 (1986)CrossRefMATHGoogle Scholar
  20. [CJ98]
    Comon, H., Jurski, Y.: Multiple counters automata, safety analysis and presburger arithmetic. In: Y. Vardi, M. (ed.) CAV 1998. LNCS, vol. 1427. Springer, Heidelberg (1998)CrossRefGoogle Scholar
  21. [DLS01]
    Dams, D.R., Lakhnech, Y., Steffen, M.: Iterating transducers. In: Berry, G., Comon, H., Finkel, A. (eds.) CAV 2001. LNCS, vol. 2102, p. 286. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  22. [ES01]
    Esparza, J., Schwoon, S.: A BDD-based model checker for recursive programs. In: Berry, G., Comon, H., Finkel, A. (eds.) CAV 2001. LNCS, vol. 2102, pp. 324–336. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  23. [FP01]
    Fisman, D., Pnueli, A.: Beyond regular model checking. In: Hariharan, R., Mukund, M., Vinay, V. (eds.) FSTTCS 2001. LNCS, vol. 2245, p. 156. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  24. [FWW97]
    Finkel, A., Willems, B., Wolper, P.: A direct symbolic approach to model checking pushdown systems (extended abstract). In: Proc.Infinity 1997, Electronic Notes in Theoretical Computer Science, Bologna (August 1997)Google Scholar
  25. [HJJ+96]
    Henriksen, J.G., Jensen, J., Jørgensen, M., Klarlund, N., Paige, B., Rauhe, T., Sandholm, A.: Mona: Monadic second-order logic in practice. In: Brinksma, E., Steffen, B., Cleaveland, W.R., Larsen, K.G., Margaria, T. (eds.) TACAS 1995. LNCS, vol. 1019. Springer, Heidelberg (1995)CrossRefGoogle Scholar
  26. [JN00]
    Jonsson, B., Nilsson, M.: Transitive closures of regular relations for verifying infinite-state systems. In: Schwartzbach, M.I., Graf, S. (eds.) TACAS 2000. LNCS, vol. 1785, p. 220. Springer, Heidelberg (2000)CrossRefGoogle Scholar
  27. [KMM+01]
    Kesten, Y., Maler, O., Marcus, M., Pnueli, A., Shahar, E.: Symbolic model checking with rich assertional languages. Theoretical Computer Science 256, 93–112 (2001)MathSciNetCrossRefMATHGoogle Scholar
  28. [KPR98]
    Kesten, Y., Pnueli, A., Raviv, L.: Algorithmic verification of linear temporal logic specifications. In: Larsen, K.G., Skyum, S., Winskel, G. (eds.) ICALP 1998. LNCS, vol. 1443, pp. 1–16. Springer, Heidelberg (1998)CrossRefGoogle Scholar
  29. [Lam94]
    Lamport, L.: The temporal logic of actions. ACM Trans. on Programming Languages and Systems 16(3), 872–923 (1994)CrossRefGoogle Scholar
  30. [PS81]
    Peterson, G.E., Stickel, M.E.: Myths about the mutal exclusion problem. Information Processing Letters 12(3), 115–116 (1981)CrossRefGoogle Scholar
  31. [QS82]
    Queille, J.P., Sifakis, J.: Specification and verification of concurrent systems in cesar. In: Dezani-Ciancaglini, M., Montanari, U. (eds.) Programming 1982. LNCS, vol. 137, pp. 337–352. Springer, Heidelberg (1982)CrossRefGoogle Scholar
  32. [Tou01]
    Touili, T.: Regular Model Checking using Widening Techniques. Electronic Notes in Theoretical Computer Science 50(4) (2001); In: Proc. Workshop on Verification of Parametrized Systems (VEPAS 2001), Crete (July 2001) Google Scholar
  33. [VW86]
    Vardi, M.Y., Wolper, P.: An automata-theoretic approach to automatic program verification. In: Proc. LICS 1986, 1st IEEE Int. Symp. on Logic in Computer Science, pp. 332–344 (June 1986)Google Scholar
  34. [WB98]
    Wolper, P., Boigelot, B.: Verifying systems with infinite but regular state spaces. In: Y. Vardi, M. (ed.) CAV 1998. LNCS, vol. 1427, pp. 88–97. Springer, Heidelberg (1998)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Parosh Aziz Abdulla
    • 1
  • Bengt Jonsson
    • 1
  • Marcus Nilsson
    • 1
  • Mayank Saksena
    • 1
  1. 1.Dept. of Information TechnologyUppsalaSweden

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