Real-Time Rewriting Logic Semantics for Spatial Concurrent Constraint Programming

  • Sergio Ramírez
  • Miguel Romero
  • Camilo Rocha
  • Frank Valencia
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 11152)


Process calculi provide a language in which the structure of terms represents the structure of processes together with an operational semantics to represent computational steps. This paper uses rewriting logic for specifying and analyzing a process calculus for concurrent constraint programming (\(\textsf {ccp}\)), combining spatial and real-time behavior. In these systems, agents can run processes in different computational spaces (e.g., containers) while subject to real-time requirements (e.g., upper bounds in the execution time of a given operation), which can be specified with both discrete and dense linear time. The real-time rewriting logic semantics is fully executable in Maude with the help of rewriting modulo SMT: partial information (i.e., constraints) in the specification is represented by quantifier-free formulas on the shared variables of the system that are under the control of SMT decision procedures. The approach is used to symbolically analyze existential real-time reachability properties of process calculi in the presence of spatial hierarchies for sharing information and knowledge.



The authors would like to thank the anonymous referees for their helpful comments. The first author was partially supported by Colciencias via the project CLASSIC (Proj. No. 125171250031). The second author was partially supported by Colciencias’ Convocatoria 761 Jóvenes Investigadores e Innovadores 2016 and Pontificia Universidad Javeriana Cali (Contract No. 416-2017). The third author was partially supported by Capital Semilla 2017, project “SCORES: Stochastic Concurrency in Rewrite-based Probabilistic Models” (Proj. No. 020100610). The third and fourth authors were partially supported by CAPES, Colciencias, and INRIA via the STIC AmSud project “EPIC: EPistemic Interactive Concurrency” (Proj. No. 88881.117603/2016-01).


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Authors and Affiliations

  1. 1.Department of Electronics and Computer SciencePontificia Universidad JaverianaCaliColombia
  2. 2.CNRS, LIX École Polytechnique de ParisParisFrance

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