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Sensing of Resistive RAM

  • Qing Yang
  • Bonan Yan
  • Hai Li
Chapter

Abstract

Resistive random-access memory (ReRAM) is a promising non-volatile memory with the configurability of resistance programmed by pulse voltage or current. ReRAM can be used for memory and computation. In this chapter, we will start with these applications and design components for ReRAM. As the sensing schemes dominate the performance, the ReRAM sensing designs in storage and processing-in-memory (PIM) applications will be explained in detail.

Keywords

Resistive random-access memory (ReRAM) Non-volatile memory Sensing Processing-in-memory (PIM) Integrate-and-fire circuit (IFC) Current sensing Voltage sensing Neuromorphic computing Sensing for computing Multiply-and-accumulate 

References

  1. 1.
    Song L, Qian X, Li H, Chen Y (2017) PipeLayer: a pipelined ReRAM-based accelerator for deep learning. In: High performance computer architecture (HPCA), 2017 IEEE International Symposium on, pp 541–552. IEEEGoogle Scholar
  2. 2.
    Shafiee A, Nag A, Muralimanohar N, Balasubramonian R, Strachan JP, Hu M, Williams RS, Srikumar V (2016) ISAAC: a convolutional neural network accelerator with in-situ analog arithmetic in crossbars. In: Proceedings of the 43rd international symposium on computer architecture, pp 14–26. IEEE PressGoogle Scholar
  3. 3.
    Chi P, Li S, Xu C, Zhang T, Zhao J, Liu Y, Wang Y, Xie Y (2016) Prime: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory. In: Proceedings of the 43rd international symposium on computer architecture, pp 27–39. IEEE PressGoogle Scholar
  4. 4.
    Song L, Zhuo Y, Qian X, Li H, Chen Y (2017) GraphR: accelerating graph processing using ReRAM. arXiv preprint arXiv:1708.06248
  5. 5.
    Liu C, Yan B, Yang C, Song L, Li Z, Liu B, Chen Y, Li H, Wu Q, Jiang H (2015) A spiking neuromorphic design with resistive crossbar. In: Design automation conference (DAC), 2015 52nd ACM/EDAC/IEEE, pp 1–6. IEEEGoogle Scholar
  6. 6.
    Jiang H, Zhu W, Luo F, Bai K, Liu C, Zhang X, Joshua Yang J, Xia Q, Chen Y, Wu Q (2016) Cyclical sensing integrate-and-fire circuit for memristor array based neuromorphic computing. In: circuits and systems (ISCAS), 2016 IEEE international symposium on, pp 930–933. IEEEGoogle Scholar
  7. 7.
    Chua L (1971) Memristor-the missing circuit element. IEEE Trans Circuit Theory 18(5):507–519CrossRefGoogle Scholar
  8. 8.
    Strukov DB, Snider GS, Stewart DR, Williams RS (2008) The missing memristor found. Nature 453(7191):80–83Google Scholar
  9. 9.
    Zhang L, Chen Z, Joshua Yang J, Wysocki B, McDonald N, Chen Y (2013) A compact modeling of TiO2-TiO2–x memristor. Appl Phys Lett 102(15):153503Google Scholar
  10. 10.
    Chang M-F, Wu J-J, Chien T-F, Liu Y-C, Yang T-C, Shen W-C, King Y-C et al (2015) Low VDDmin swing-sample-and-couple sense amplifier and energy-efficient self-boost-write-termination scheme for embedded ReRAM macros against resistance and switch-time variations. IEEE J Solid-State Circuits 50(11):2786–2795CrossRefGoogle Scholar
  11. 11.
    Lo C-P, Lin W-Z, Lin W-Y, Lin H-T, Yang T-H, Chiang Y-N, King Y-C et al (2017) Embedded 2 Mb ReRAM macro with 2.6 ns read access time using dynamic-trip-point-mismatch sampling current-mode sense amplifier for IoE applications. In: VLSI circuits, 2017 symposium on, pp C164–C165. IEEEGoogle Scholar
  12. 12.
    Chang Meng-Fan, Sheu Shyh-Shyuan, Lin Ku-Feng, Che-Wei Wu, Kuo Chia-Chen, Chiu Pi-Feng, Yang Yih-Shan et al (2013) A high-speed 7.2-ns read-write random access 4-Mb embedded resistive RAM (ReRAM) macro using process-variation-tolerant current-mode read schemes. IEEE J Solid-State Circuits 48(3):878–891CrossRefGoogle Scholar
  13. 13.
    Sheu S-S, Chang M-F, Lin K-F, Wu C-W, Chen Y-S, Chiu P-F, Kuo C-C et al (2011) A 4 Mb embedded SLC resistive-RAM macro with 7.2 ns read-write random-access time and 160 ns MLC-access capability. In: Solid-state circuits conference digest of technical papers (ISSCC), 2011, IEEE International, pp 200–202. IEEEGoogle Scholar
  14. 14.
    Han X, Jia Q, Sun H, Wang L, Wu H, Cai Y, Zhang F et al (2017) A 0.13 μm 64 Mb HfO x ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. In: Custom integrated circuits conference (CICC), 2017 IEEE, pp 1–4. IEEEGoogle Scholar

Copyright information

© Springer International Publishing AG, part of Springer Nature 2019

Authors and Affiliations

  1. 1.Department of Electrical and Computer EngineeringDuke UniversityDurhamUSA

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