Optimal Sizing of Low-DropOut Voltage Regulators by NSGA-II and PVT Analysis
The optimization of analog integrated circuits has been a challenge due to the fact that there are not rules or systematic guidelines to bias and size the transistors and other elements in the circuit under design. This Chapter reviews the design of generic operational amplifiers by using complementary metal-oxide-semiconductor (CMOS) integrated circuit technology and shows the optimization of three different low-dropout (LDO) voltage regulators that consists of an operational amplifier and passive circuit elements. We highlight that if one performs a sensitivity analysis for each LDO, then a reduced set of design variables can be selected to create the chromosome for performing a multi-objective optimization by the well-known Non-Dominated Sorting Genetic Algorithm II (NSGA-II). In addition, the computed sensitivities are used to reduce the search spaces for the design variables of the MOS transistors to accelerate the optimization process. Finally, from the feasible solutions of the three LDOs, a process-voltage and temperature (PVT) analysis is performed to guarantee that the designed LDO is robust to variations.
KeywordsLow-dropout voltage regulator Multi-objective optimization Circuit sizing NSGA-II Operational transconductance amplifier MOS transistor SPICE
This work is partially supported by CONACyT-Mexico under grant 237991.
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