Reliability Physics and Engineering pp 165-225 | Cite as

# Time-to-Failure Models for Selected Failure Mechanisms in Integrated Circuits

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## Abstract

Advanced integrated circuits (ICs) are very complex, both in terms of their design and in their usage of many dissimilar materials (semiconductors, insulators, metals, plastic molding compounds, etc.). For cost reductions per device and improved performance, scaling of device geometries has played a critically important role in the success of semiconductors. This scaling—where device geometries are generally reduced by 0.7 × for each new technology node and tend to conform to Moore’s Law—has caused the electric fields in the materials to rise (bringing the materials ever closer to their breakdown strength) and current densities in the metallization to rise causing electromigration (EM) concerns. The higher electric fields can accelerate reliability issues such as: time-dependent dielectric breakdown (TDDB), hot-carrier injection (HCI), and negative-bias temperature instability (NBTI). In addition, the use of dissimilar materials in a chip and in the assembly process produces a number of thermal expansion mismatches which can drive large thermomechanical stresses. These thermomechanical stresses can result in failure mechanisms such as stress migration (SM), creep, fatigue, cracking, delaminating interfaces, etc.

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