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Memristive In Situ Computing

  • Omid KaveheiEmail author
  • Efstratios Skafidas
  • Kamran Eshraghian
Chapter

Abstract

The missing link between a nonlinear circuit element that is able to self-adjust its conductance according to the history of applied voltage/current and physical realizations of two-terminal oxide-based resistive memory was discovered in early 2008, and has since then been intensively studied. This class of memory devices is called memristive devices, which includes resistive random access memories (RRAM), phase change memories (PCM) and spin-transfer torque magnetoresistive memories (STT-MRAM). Memristive devices are mostly CMOS and fab friendly, and promise simpler architecture, high scalability and stackability (3D), good selectivity, relatively, low-power consumption, high endurance and retention, and fast operation by utilizing parallelism, and the most important of all, the ability to merge logic and memory. A significantly wide range of material systems show that resistive switching can be categorized under three main redox-related effects, electrochemical metalization effects (ECM), valency change memory effect (VCM) and thermochemical memory effects (TCM). Although, the behavior of these resistive memories can be modeled using high-level finite-state machines (FSMs), the underlying switching mechanisms is yet to be fully understood. Despite this shortage, their application in memory and computing has been constantly improved. These devices can be programmed to exhibit multi-level cell (MLC) and binary cell behavior, thus analog and digital memories can be exists in one device depends on programming. In this chapter, we highlight some of the in situ computational capability of memristive devices.

Notes

Acknowledgements

This work was supported by an Early Career Researcher grant from the Melbourne School of Engineering, University of Melbourne.

References

  1. 1.
    Alibart, F., Zamanidoost, E., Strukov, D.B.: Pattern classification by memristive crossbar circuits using ex situ and in situ training. Nat. Commun. 4, 2072 (2013)CrossRefGoogle Scholar
  2. 2.
    Backus, J.: Can programming be liberated from the von Neumann style?: a functional style and its algebra of programs. Commun. ACM 21(8), 613–641 (1978)MathSciNetzbMATHCrossRefGoogle Scholar
  3. 3.
    Bienenstock, E.L., Cooper, L.N., Munro, P.W.: Theory for the development of neuron selectivity: orientation specificity and binocular interaction in visual cortex. J. Neurosci. 2(1), 32–48 (1982)CrossRefGoogle Scholar
  4. 4.
    Borghetti, J., Snider, G., Kuekes, P., Yang, J., Stewart, D., Williams, R.: Memristive’ switches enable ‘stateful’ logic operations via material implication. Nature 464(7290), 873–876 (2010)CrossRefGoogle Scholar
  5. 5.
    Caporale, N., Dan, Y.: Spike timing-dependent plasticity: a hebbian learning rule. Annu. Rev. Neurosci. 31, 25–46 (2008)CrossRefGoogle Scholar
  6. 6.
    Chang, T., Jo, S.-H., Lu, W.: Short-term memory to long-term memory transition in a nanoscale memristor. ACS Nano 5(9), 7669–7676 (2011)CrossRefGoogle Scholar
  7. 7.
    Chua, L.O.: Memristor - the missing circuit element. IEEE Trans. Circ. Theor. 18(5), 507–519 (1971)CrossRefGoogle Scholar
  8. 8.
    Chua, L.O., Kang, S.M.: Memristive devices and systems. Proc. IEEE 64(2), 209–223 (1976)MathSciNetCrossRefGoogle Scholar
  9. 9.
    Hasegawa, T., Ohno, T., Terabe, K., Tsuruoka, T., Nakayama, T., Gimzewski, J., Aono, M.: Learning abilities achieved by a single solid-state atomic switch. Adv. Mater. 22(16), 1831–1834 (2010)CrossRefGoogle Scholar
  10. 10.
    Izhikevich, E.M., Desai, N.S.: Relating STDP to BCM. Neural Comput. 15(7), 1511–1523 (2003)zbMATHCrossRefGoogle Scholar
  11. 11.
    Jackson, B.L., Rajendran, B., Corrado, G.S., Breitwisch, M., Burr, G.W., Cheek, R., Gopalakrishnan, K., Raoux, S., Rettner, C.T., Padilla, A., et al.: Nanoscale electronic synapses using phase change devices. ACM J. Emerg. Technol. Comput. Syst. (JETC) 9(2), 12 (2013)Google Scholar
  12. 12.
    Jeong, D.S., Kim, I., Ziegler, M., Kohlstedt, H.: Towards artificial neurons and synapses: a materials point of view. RSC Adv. 3(10), 3169–3183 (2013)CrossRefGoogle Scholar
  13. 13.
    Jiang, H., Xia, Q.: Effect of voltage polarity and amplitude on electroforming of TiO\(_2\) based memristive devices. Nanoscale 5(8), 3257–3261 (2013)CrossRefGoogle Scholar
  14. 14.
    Jo, S., Chang, T., Ebong, I., Bhadviya, B., Mazumder, P., Lu, W.: Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett. 10(4), 1297–1301 (2010)CrossRefGoogle Scholar
  15. 15.
    Kavehei, O., Iqbal, A., Kim, Y., Eshraghian, K., Al-Sarawi, S., Abbott, D.: The fourth element: characteristics, modelling and electromagnetic theory of the memristor. Proc. R. Soc. A Math. Phys. Eng. Sci. 466(2120), 2175 (2010)MathSciNetzbMATHCrossRefGoogle Scholar
  16. 16.
    Kavehei, O., Al-Sarawi, S., Cho, K.-R., Eshraghian, K., Abbott, D.: An analytical approach for memristive nanoarchitectures. IEEE Trans. Nanotechnol. 11(2), 374–385 (2012)CrossRefGoogle Scholar
  17. 17.
    Kavehei, O., Al-Sarawi, S., Cho, K.-R., Iannella, N., Kim, S.-J., Eshraghian, K., Abbott, D.: Memristor-based synaptic networks and logical operations using in-situ computing. In: International Conference on Intelligent Sensors, Sensor Networks and Information Processing, pp. 137–142 (2011)Google Scholar
  18. 18.
    Kavehei, O., Cho, K., Lee, S., Kim, S., Al-Sarawi, S., Abbott, D., Eshraghian, K.: Fabrication and modeling of Ag/TiO\(_{2}\)/ITO memristor. In: 54th IEEE International Midwest Symposium on Circuits and Systems, pp. 1–4 (2011)Google Scholar
  19. 19.
    Kavehei, O., Cho, K.-R., Lee, S.-J., Al-Sarawi, S., Eshraghian, K., Abbott, D.: Integrated memristor-mos (m2) sensor for basic pattern matching applications. J. Nanosci. Nanotechnol. 13(5), 3638–3640 (2013)CrossRefGoogle Scholar
  20. 20.
    Kavehei, O., Lee, S.-J., Cho, K.-R., Al-Sarawi, S., Abbott, D.: A pulse-frequency modulation sensor using memristive-based inhibitory interconnections. J. Nanosci. Nanotechnol. 13(5), 3505–3510 (2013)CrossRefGoogle Scholar
  21. 21.
    Kavehei, O., Linn, E., Nielen, L., Tappertzhofen, S., Skafidas, E., Valov, I., Waser, R.: An associative capacitive network based on nanoscale complementary resistive switches for memory-intensive computing. Nanoscale 5(11), 5119–5128 (2013)CrossRefGoogle Scholar
  22. 22.
    Kim, K.-H., Gaba, S., Wheeler, D., Cruz-Albrecht, J.M., Hussain, T., Srinivasa, N., Lu, W.: A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. Nano Lett. 12(1), 389–395 (2011)CrossRefGoogle Scholar
  23. 23.
    Li, S., Zeng, F., Chen, C., Liu, H., Tang, G., Gao, S., Song, C., Lin, Y., Guo, D., et al.: Synaptic plasticity and learning behaviours mimicked through Ag interface movement in an Ag/conducting polymer/Ta memristive system. J. Mater. Chem. C 1(34), 5292–5298 (2013)CrossRefGoogle Scholar
  24. 24.
    Lim, H., Jang, H.-W., Lee, D.-K., Kim, I., Hwang, C.S., Jeong, D.S.: Elastic resistance change and action potential generation of non-faradaic Pt/TiO\(_2\)/Pt capacitors. Nanoscale 5(14), 6363–6371 (2013)CrossRefGoogle Scholar
  25. 25.
    Linn, E., Rosezin, R., Kügeler, C., Waser, R.: Complementary resistive switches for passive nanocrossbar memories. Nat. Mater. 9(5), 403–406 (2010)CrossRefGoogle Scholar
  26. 26.
    Menzel, S., Tappertzhofen, S., Waser, R., Valov, I.: Switching kinetics of electrochemical metallization memory cells. Phys. Chem. Chem. Phys. 15(18), 6945–6952 (2013)CrossRefGoogle Scholar
  27. 27.
    Mott, N., Gurney, R.: Electronic processes in ionic crystals, Chap. 2. Dover (1964)Google Scholar
  28. 28.
    Mouttet, B.: Proposal for memristors in signal processing. Nano-Net, pp. 11–13 (2009)Google Scholar
  29. 29.
    Ohno, T., Hasegawa, T., Tsuruoka, T., Terabe, K., Gimzewski, J.K., Aono, M.: Short-term plasticity and long-term potentiation mimicked in single inorganic synapses. Nat. Mater. 10(8), 591–595 (2011)CrossRefGoogle Scholar
  30. 30.
    Ovshinsky, S.R.: Reversible electrical switching phenomena in disordered structures. Phys. Rev. Lett. 21, 1450–1453 (1968)CrossRefGoogle Scholar
  31. 31.
    Ovshinsky, S.R.: The ovonic cognitive computer: a new paradigm. EPCOS Library (2004)Google Scholar
  32. 32.
    Pershin, Y., Di Ventra, M.: Practical approach to programmable analog circuits with memristors. IEEE Trans. Circ. Syst. I Reg. Pap. 57(8), 1857–1864 (2010)MathSciNetCrossRefGoogle Scholar
  33. 33.
    Pershin, Y., Di Ventra, M.: Memory effects in complex materials and nanoscale systems. Adv. Phys. 60(2), 145–227 (2011)CrossRefGoogle Scholar
  34. 34.
    Pfeil, T., Potjans, T.C., Schrader, S., Potjans, W., Schemmel, J., Diesmann, M., Meier, K.: Is a 4-bit synaptic weight resolution enough?-constraints on enabling spike-timing dependent plasticity in neuromorphic hardware. Frontiers Neurosci. 6, 90 (2012)CrossRefGoogle Scholar
  35. 35.
    Pickett, M.D., Strukov, D.B., Borghetti, J.L., Yang, J.J., Snider, G.S., Stewart, D.R., Williams, R.S.: Switching dynamics in titanium dioxide memristive devices. J. Appl. Phys. 106(7), 074508 (2009)CrossRefGoogle Scholar
  36. 36.
    Qureshi, M.S., Pickett, M., Miao, F., Strachan, J.P.: CMOS interface circuits for reading and writing memristor crossbar array. In: IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2954–2957 (2011)Google Scholar
  37. 37.
    Rosezin, R., Linn, E., Kügeler, C., Bruchhaus, R., Waser, R.: Crossbar logic using bipolar and complementary resistive switches. IEEE Electron Dev. Lett. 32(6), 710–712 (2011)CrossRefGoogle Scholar
  38. 38.
    Snider, G.S.: Cortical computing with memristive nanodevices. SciDAC Rev. 10, 58–65 (2008)Google Scholar
  39. 39.
    Snider, G.S.: Instar and outstar learning with memristive nanodevices. Nanotechnology 22(1), 015201 (2011)MathSciNetCrossRefGoogle Scholar
  40. 40.
    Song, S., Miller, K., Abbott, L.: Competitive Hebbian learning through spike-timing-dependent synaptic plasticity. Nat. Neurosci. 3, 919–926 (2000)CrossRefGoogle Scholar
  41. 41.
    Strukov, D.B., Snider, G.S., Stewart, D.R., Williams, R.S.: The missing memristor found. Nature 453, 80–83 (2008)CrossRefGoogle Scholar
  42. 42.
    Suri, M., Querlioz, D., Bichler, O., Palma, G., Vianello, E., Vuillaume, D., Gamrat, C., DeSalvo, B.: Bio-inspired stochastic computing using binary CBRAM synapses. IEEE Trans. Electron Dev. 60(7), 2402–2409 (2013)CrossRefGoogle Scholar
  43. 43.
    Thakoor, S., Moopenn, A., Daud, T., Thakoor, A.: Solid-state thin-film memistor for electronic neural networks. J. Appl. Phys. 67(6), 3132–3135 (1990)CrossRefGoogle Scholar
  44. 44.
    Valov, I., Linn, E., Tappertzhofen, S., Schmelzer, S., van den Hurk, J., Lentz, F., Waser, R.: Nanobatteries in redox-based resistive switches require extension of memristor theory. Nat. Commun. 4, 1771 (2013)CrossRefGoogle Scholar
  45. 45.
    Waser, R.: Nanoelectronics and Information Technology. Wiley-VCH, Weinheim (2012)Google Scholar
  46. 46.
    Waser, R., Aono, M.: Nanoionics-based resistive switching memories. Nat. Mater. 6(11), 833–840 (2007)CrossRefGoogle Scholar
  47. 47.
    Whitehead, A., Russell, B.: Principia Mathematica, vol. 2 (1912)Google Scholar
  48. 48.
    Widrow, B.: An adaptive ‘ADALINE’ neuron using chemical “memistors”. Stanford Electronics Laboratories Technical Report, Tech. Rep. TR-1553-2, 23 Oct 1960Google Scholar
  49. 49.
    Xia, Q., Pickett, M.D., Yang, J.J., Li, X., Wu, W., Medeiros-Ribeiro, G., Williams, R.S.: Two-and three-terminal resistive switches: nanometer-scale memristors and memistors. In: Advanced Functional Materials 21(14), 2660–2665 (2011)CrossRefGoogle Scholar
  50. 50.
    Yang, J.J., Strukov, D.B., Stewart, D.R.: Memristive devices for computing. Nat. Nanotechnol. 8(1), 13–24 (2012)CrossRefGoogle Scholar
  51. 51.
    Yang, J.J., Zhang, M.-X., Pickett, M.D., Miao, F., Strachan, J.P., Li, W.-D., Yi, W., Ohlberg, D.A., Choi, B.J., Wu, W., et al.: Engineering nonlinearity into memristors for passive crossbar applications. Appl. Phys. Lett. 100, 113501 (2012)CrossRefGoogle Scholar
  52. 52.
    Yu, S., Gao, B., Fang, Z., Yu, H., Kang, J., Wong, H.-S.P.: A neuromorphic visual system using RRAM synaptic devices with sub-pJ energy and tolerance to variability: experimental characterization and large-scale modeling. In: IEEE International Electron Devices Meeting, pp. 239–242 (2012)Google Scholar
  53. 53.
    Zamarreño-Ramos, C., Camuñas-Mesa, L., Pérez-Carrasco, J., Masquelier, T., Serrano-Gotarredona, T., Linares-Barranco, B.: On spike-timing-dependent-plasticity, memristive devices, and building a self-learning visual cortex. Frontiers Neurosci. 5, 26 (2011)CrossRefGoogle Scholar

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© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Omid Kavehei
    • 1
    Email author
  • Efstratios Skafidas
    • 1
    • 2
  • Kamran Eshraghian
    • 3
  1. 1.School of Electrical and Information EngineeringThe University of SydneySydneyAustralia
  2. 2.Victoria Research LaboratoryNational ICT Australia (NICTA)MelbourneAustralia
  3. 3.iDataMap CorporationEastwoodAustralia

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