Robust Hybrid TFET-MOSFET Circuits in Presence of Process Variations and Soft Errors

  • Maedeh Hemmat
  • Mehdi KamalEmail author
  • Ali Afzali-Kusha
  • Massoud Pedram
Conference paper
Part of the IFIP Advances in Information and Communication Technology book series (IFIPAICT, volume 508)


In this work, to improve the timing yield of Tunnel Field Effect Transistor (TFET) circuits in the presence of process variations as well as their soft-error resiliency, we propose replacing some of TFET-based gates by MOSFET-based ones. The effectiveness of the proposed TFET-MOSFET hybrid implementation of the circuits are investigated by first studying the impacts of the process variation on the performances (I-V characteristics) of both homojunction InAs TFETs and MOSFETs. Next, to analyze the soft error rate of the circuits, the particle hit-induced transient current profiles of these devices are extracted. Based on these studies, a hybrid TFET-MOSFET circuit design approach which improves the reliability and soft-error resiliency compared to those of pure TFET-based circuits is suggested. Finally, the efficacy of the design approach is investigated by applying it to some circuits of ISCAS’89 benchmark package.


Tunnel FET Reliability issues Process variation Low power design Hybrid TFET-MOSFET designs Soft error 


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Copyright information

© IFIP International Federation for Information Processing 2017

Authors and Affiliations

  • Maedeh Hemmat
    • 1
  • Mehdi Kamal
    • 1
    Email author
  • Ali Afzali-Kusha
    • 1
  • Massoud Pedram
    • 2
  1. 1.School of Electrical and Computer EngineeringUniversity of TehranTehranIran
  2. 2.Department of Electrical EngineeringUniversity of Southern CaliforniaLos AngelesUSA

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