Automatic Estimation of Verified Floating-Point Round-Off Errors via Static Analysis

  • Mariano MoscatoEmail author
  • Laura TitoloEmail author
  • Aaron Dutle
  • César A. Muñoz
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10488)


This paper introduces a static analysis technique for computing formally verified round-off error bounds of floating-point functional expressions. The technique is based on a denotational semantics that computes a symbolic estimation of floating-point round-off errors along with a proof certificate that ensures its correctness. The symbolic estimation can be evaluated on concrete inputs using rigorous enclosure methods to produce formally verified numerical error bounds. The proposed technique is implemented in the prototype research tool PRECiSA (Program Round-off Error Certifier via Static Analysis) and used in the verification of floating-point programs of interest to NASA.



Research by the first two authors was supported by the National Aeronautics and Space Administration under NASA/NIA Cooperative Agreement NNL09AA00A.


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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  1. 1.National Institute of AerospaceHamptonUSA
  2. 2.NASA Langley Research CenterHamptonUSA

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