Scheduling for Better Energy Efficiency on Many-Core Chips

  • Chanseok Kang
  • Seungyul Lee
  • Yong-Jun Lee
  • Jaejin Lee
  • Bernhard Egger
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10353)

Abstract

Many-core chips are especially attractive for data center operators providing cloud computing service models. With the advance of many-core chips in such environments energy-conscious scheduling of independent processes or operating systems (OSes) is gaining importance. An important research question is how the scheduler of such a system should assign the cores to the OSes in order to achieve a better energy utilization. In this paper, we demonstrate that many-core chips offer new opportunities for extremely light-weight migration of independent processes (or OSes) running bare-metal on the many-core chip. We then show how this intra-chip migration can be utilized to achieve a better performance per watt ratio by implementing a hierarchical power-management scheme on top of dynamic voltage and frequency scaling (DVFS). We have implemented and tested the proposed techniques on the Intel Single Chip Cloud Computer (SCC). Combining migration with DVFS we achieve, on average, a 25–35% better performance per watt over a DVFS-only solution.

Keywords

Scheduling Process migration DVFS Performance per watt 

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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • Chanseok Kang
    • 1
  • Seungyul Lee
    • 1
  • Yong-Jun Lee
    • 1
  • Jaejin Lee
    • 1
  • Bernhard Egger
    • 1
  1. 1.Department of Computer Science and EngineeringSeoul National UniversitySeoulKorea

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