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A Quantitative Analysis of the Memory Architecture of FPGA-SoCs

  • Matthias Göbel
  • Ahmed Elhossini
  • Chi Ching Chi
  • Mauricio Alvarez-Mesa
  • Ben Juurlink
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10216)

Abstract

In recent years, so called FPGA-SoCs have been introduced by Intel (formerly Altera) and Xilinx. These devices combine multi-core processors with programmable logic. This paper analyzes the various memory and communication interconnects found in actual devices, particularly the Zynq-7020 and Zynq-7045 from Xilinx and the Cyclone V SE SoC from Intel. Issues such as different access patterns, cache coherence and full-duplex communication are analyzed, for both generic accesses as well as for a real workload from the field of video coding. Furthermore, the paper shows that by carefully choosing the memory interconnect networks as well as the software interface, high-speed memory access can be achieved for various scenarios.

Keywords

Programmable Logic Memory Access Video Code Memory Bandwidth Memory Controller 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • Matthias Göbel
    • 1
  • Ahmed Elhossini
    • 1
  • Chi Ching Chi
    • 2
  • Mauricio Alvarez-Mesa
    • 2
  • Ben Juurlink
    • 1
  1. 1.Embedded Systems ArchitectureTechnische Universität BerlinBerlinGermany
  2. 2.Spin Digital Video Technologies GmbHBerlinGermany

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