HW/SW Co-design Toolset for Customization of Exposed Datapath Processors

  • Pekka Jääskeläinen
  • Timo Viitanen
  • Jarmo Takala
  • Heikki Berg


Customized processors are an interesting option for implementing software defined radios; they bring benefits of tailored fixed function hardware while adding new advantages such as reduced implementation verification effort and increased post-fabrication flexibility. To reduce the engineering costs and the time-to-market of platforms with new computing devices, the processor customization process should be supported with automated design flows that include tools like retargeting compilers, instruction-set simulators, and RTL generators. This chapter presents an open source processor co-design toolset that is based on a computation resource oriented design methodology where the primary design choices are the set of resources to include in the processor at hand, instead of focusing on instruction encoding details. The toolset is based on a retargetable high-level language compiler and a scalable exposed datapath template which support different styles of parallelism available in applications. In addition to various published academic processor design examples for SDR algorithms, the tools have been used to design and program processors that have been implemented down to silicon layout level and integrated in commercial grade chips.


Function Unit Interconnection Network Register File Software Define Radio Design Space Exploration 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer International Publishing Switzerland 2017

Authors and Affiliations

  • Pekka Jääskeläinen
    • 1
  • Timo Viitanen
    • 1
  • Jarmo Takala
    • 1
  • Heikki Berg
    • 2
  1. 1.Tampere University of TechnologyTampereFinland
  2. 2.Nokia TechnologiesTampereFinland

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