Optimized Mapping Spiking Neural Networks onto Network-on-Chip

  • Yu Ji
  • Youhui ZhangEmail author
  • He Liu
  • Weimin Zheng
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10048)


Mapping spiking neural networks (SNNs) onto network-on-chips (NoCs) is pivotal to fully utilize the hardware resources of dedicated multi-core processors (CMPs) for SNNs’ simulation. This paper presents such a mapping framework from the aspect of architecture evaluation. Under this framework, we present two strategies accordingly: The first tends to put highly communicating tasks together. The second is opposite, which aims at SNN features to achieve a balanced distribution of neurons according to their active degrees; for communication-intensive and unbalanced SNNs, this one can alleviate NoC congestion and improve the simulation speed more. This framework also contains a customized NoC simulator to evaluate mapping strategies. Results show that our strategies can achieve a higher simulation speed (up to 1.37 times), and energy consumptions can be reduced or rise very limited.


Mapping Strategy Transmission Delay Active Degree Deep Belief Network Simulation Speed 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer International Publishing AG 2016

Authors and Affiliations

  1. 1.Department of Computer Science and TechnologyTsinghua UniversityBeijingChina
  2. 2.Technology Innovation Center at YinzhouYangtze Delta Region Institute of Tsinghua UniversityJiaxingChina
  3. 3.Center for Brain-Inspired Computing ResearchTsinghua UniversityBeijingChina

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